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llvm-6502/test/CodeGen/X86/atomic-minmax-i6432.ll
Michael Liao fe9dbe0066 Fix two remaining issue after fixing PR15355 when CMOV is not available
- Phi nodes should be replaced/updated after lowering CMOV into branch
  because 'mainMBB' updating operand in Phi node is changed.
- Add EFLAGS in livein before lowering the 2nd CMOV. It's necessary as
  we will reuse the EFLAGS generated before the 1st lowered CMOV, which
  won't clobber EFLAGS. However, we need explicitly specify that.
- '-attr=-cmov' test case are added.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176598 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 01:01:29 +00:00

109 lines
2.4 KiB
LLVM

; RUN: llc -march=x86 -mattr=+cmov -mtriple=i386-pc-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=LINUX
; RUN: llc -march=x86 -mattr=-cmov -mtriple=i386-pc-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=NOCMOV
; RUN: llc -march=x86 -mtriple=i386-macosx -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s -check-prefix=PIC
@sc64 = external global i64
define void @atomic_maxmin_i6432() {
; LINUX: atomic_maxmin_i6432
%1 = atomicrmw max i64* @sc64, i64 5 acquire
; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
; LINUX: cmpl
; LINUX: setl
; LINUX: cmpl
; LINUX: setl
; LINUX: cmovne
; LINUX: cmovne
; LINUX: lock
; LINUX-NEXT: cmpxchg8b
; LINUX: jne [[LABEL]]
; NOCMOV: [[LABEL:.LBB[0-9]+_[0-9]+]]
; NOCMOV: cmpl
; NOCMOV: setl
; NOCMOV: cmpl
; NOCMOV: setl
; NOCMOV: jne
; NOCMOV: jne
; NOCMOV: lock
; NOCMOV-NEXT: cmpxchg8b
; NOCMOV: jne [[LABEL]]
%2 = atomicrmw min i64* @sc64, i64 6 acquire
; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
; LINUX: cmpl
; LINUX: setg
; LINUX: cmpl
; LINUX: setg
; LINUX: cmovne
; LINUX: cmovne
; LINUX: lock
; LINUX-NEXT: cmpxchg8b
; LINUX: jne [[LABEL]]
; NOCMOV: [[LABEL:.LBB[0-9]+_[0-9]+]]
; NOCMOV: cmpl
; NOCMOV: setg
; NOCMOV: cmpl
; NOCMOV: setg
; NOCMOV: jne
; NOCMOV: jne
; NOCMOV: lock
; NOCMOV-NEXT: cmpxchg8b
; NOCMOV: jne [[LABEL]]
%3 = atomicrmw umax i64* @sc64, i64 7 acquire
; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
; LINUX: cmpl
; LINUX: setb
; LINUX: cmpl
; LINUX: setb
; LINUX: cmovne
; LINUX: cmovne
; LINUX: lock
; LINUX-NEXT: cmpxchg8b
; LINUX: jne [[LABEL]]
; NOCMOV: [[LABEL:.LBB[0-9]+_[0-9]+]]
; NOCMOV: cmpl
; NOCMOV: setb
; NOCMOV: cmpl
; NOCMOV: setb
; NOCMOV: jne
; NOCMOV: jne
; NOCMOV: lock
; NOCMOV-NEXT: cmpxchg8b
; NOCMOV: jne [[LABEL]]
%4 = atomicrmw umin i64* @sc64, i64 8 acquire
; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
; LINUX: cmpl
; LINUX: seta
; LINUX: cmpl
; LINUX: seta
; LINUX: cmovne
; LINUX: cmovne
; LINUX: lock
; LINUX-NEXT: cmpxchg8b
; LINUX: jne [[LABEL]]
; NOCMOV: [[LABEL:.LBB[0-9]+_[0-9]+]]
; NOCMOV: cmpl
; NOCMOV: seta
; NOCMOV: cmpl
; NOCMOV: seta
; NOCMOV: jne
; NOCMOV: jne
; NOCMOV: lock
; NOCMOV-NEXT: cmpxchg8b
; NOCMOV: jne [[LABEL]]
ret void
}
; rdar://12453106
@id = internal global i64 0, align 8
define void @tf_bug(i8* %ptr) nounwind {
; PIC: tf_bug:
; PIC: movl _id-L1$pb(
; PIC: movl (_id-L1$pb)+4(
%tmp1 = atomicrmw add i64* @id, i64 1 seq_cst
%tmp2 = add i64 %tmp1, 1
%tmp3 = bitcast i8* %ptr to i64*
store i64 %tmp2, i64* %tmp3, align 4
ret void
}