llvm-6502/test/CodeGen
Michael Liao fd0832ea89 [X86] Restore X86 base pointer after call to llvm.eh.sjlj.setjmp
Commit on 

- This patch fixes the bug described in
  http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-May/062343.html

The fix allocates an extra slot just below the GPRs and stores the base pointer
there. This is done only for functions containing llvm.eh.sjlj.setjmp that also
need a base pointer. Because code containing llvm.eh.sjlj.setjmp saves all of
the callee-save GPRs in the prologue, the offset to the extra slot can be
computed before prologue generation runs.

Impact at run-time on affected functions is::

  - One extra store in the prologue, The store saves the base pointer.
  - One extra load after a llvm.eh.sjlj.setjmp. The load restores the base pointer.

Because the extra slot is just above a gap between frame-pointer-relative and
base-pointer-relative chunks of memory, there is no impact on other offset
calculations other than ensuring there is room for the extra slot.

http://reviews.llvm.org/D6388

Patch by Arch Robison <arch.robison@intel.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223329 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 00:56:38 +00:00
..
AArch64 AArch64: fix wrong-endian parameter passing. 2014-12-03 17:49:26 +00:00
ARM Emit ABI_FP_rounding attribute. 2014-12-03 08:12:26 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] Fix passing of small structures for big-endian O32. 2014-12-02 20:40:27 +00:00
MSP430
NVPTX [NVPTX] Do not emit .weak symbols for NVPTX 2014-12-01 21:16:17 +00:00
PowerPC [PowerPC] 'cc' should be an alias only to 'cr0' 2014-12-04 00:46:20 +00:00
R600 R600/SI: Remove i1 pseudo VALU ops 2014-12-03 05:22:35 +00:00
SPARC
SystemZ
Thumb This reverts commit r223306 and r223277. 2014-12-03 23:29:34 +00:00
Thumb2 ARM: allow constpool entry to be moved to the user's block in all cases. 2014-11-13 17:58:53 +00:00
X86 [X86] Restore X86 base pointer after call to llvm.eh.sjlj.setjmp 2014-12-04 00:56:38 +00:00
XCore