6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-01 10:57:21 +00:00
Code Issues Projects Releases Wiki Activity
d3da6d5dda
llvm-6502/test/MC
History
Akira Hatanaka 0c66403efd [mips] Add definition of JALR instruction which has two register operands. Change the 
original JALR instruction with one register operand to be a pseudo-instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174657 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07 19:48:00 +00:00
..
AArch64 Add AArch64 CRC32 instructions 2013-02-06 09:13:13 +00:00
ARM Add a special ARM trap encoding for NaCl. 2013-01-30 16:30:19 +00:00
AsmParser
COFF [MC][COFF] Delay handling symbol aliases when writing 2013-01-29 22:10:07 +00:00
Disassembler Add AArch64 CRC32 instructions 2013-02-06 09:13:13 +00:00
ELF
MachO
Markup
MBlaze
Mips [mips] Add definition of JALR instruction which has two register operands. Change the 2013-02-07 19:48:00 +00:00
PowerPC
X86 [MC] Bundle alignment: Invalidate relaxed fragments 2013-02-05 17:55:27 +00:00