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https://github.com/c64scene-ar/llvm-6502.git
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1911fd4f85
This pass: 1. Splits TargetMachine into TargetMachine (generic targets, can be implemented any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by things using libcodegen and other support). 2. Instead of having each target fully populate the passmgr for file or JIT output, move all this to common code, and give targets hooks they can implement. 3. Commonalize the target population stuff between file emission and JIT emission. 4. All (native code) codegen stuff now happens in a FunctionPassManager, which paves the way for "fast -O0" stuff in the CFE later, and now LLC could lazily stream .bc files from disk to use less memory. 5. There are now many fewer #includes and the targets don't depend on the scalar xforms or libanalysis anymore (but codegen does). 6. Changing common code generator pass ordering stuff no longer requires touching all targets. 7. The JIT now has the option of "-fast" codegen or normal optimized codegen, which is now orthogonal to the fact that JIT'ing is being done. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8
74 lines
2.4 KiB
C++
74 lines
2.4 KiB
C++
//===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the x86
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// target library, as used by the LLVM JIT.
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//
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//===----------------------------------------------------------------------===//
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#ifndef TARGET_X86_H
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#define TARGET_X86_H
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#include <iosfwd>
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namespace llvm {
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class X86TargetMachine;
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class FunctionPassManager;
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class FunctionPass;
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class IntrinsicLowering;
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class MachineCodeEmitter;
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/// createX86ISelDag - This pass converts a legalized DAG into a
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/// X86-specific DAG, ready for instruction scheduling.
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///
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FunctionPass *createX86ISelDag(X86TargetMachine &TM, bool Fast);
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/// createX86FloatingPointStackifierPass - This function returns a pass which
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/// converts floating point register references and pseudo instructions into
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/// floating point stack references and physical instructions.
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///
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FunctionPass *createX86FloatingPointStackifierPass();
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/// createX86CodePrinterPass - Returns a pass that prints the X86
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/// assembly code for a MachineFunction to the given output stream,
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/// using the given target machine description.
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///
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FunctionPass *createX86CodePrinterPass(std::ostream &o, X86TargetMachine &tm);
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/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
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/// to the specified MCE object.
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FunctionPass *createX86CodeEmitterPass(X86TargetMachine &TM,
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MachineCodeEmitter &MCE);
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/// addX86ELFObjectWriterPass - Add passes to the FPM that output the generated
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/// code as an ELF object file.
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///
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void addX86ELFObjectWriterPass(FunctionPassManager &FPM,
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std::ostream &o, X86TargetMachine &tm);
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/// createX86EmitCodeToMemory - Returns a pass that converts a register
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/// allocated function into raw machine code in a dynamically
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/// allocated chunk of memory.
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///
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FunctionPass *createEmitX86CodeToMemory();
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} // End llvm namespace
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// Defines symbolic names for X86 registers. This defines a mapping from
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// register name to register number.
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//
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#include "X86GenRegisterNames.inc"
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// Defines symbolic names for the X86 instructions.
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//
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#include "X86GenInstrNames.inc"
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#endif
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