Zoran Jovanovic 9d115effdf [mips][microMIPS] Implement ERET and ERETNC instructions ... http://reviews.llvm.org/D10091 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239522 91177308-0d34-0410-b5e6-96231b3b80d8		2015-06-11 10:22:46 +00:00
..
AArch64	ARM]: Add support for MMFR4_EL1 in assembler	2015-06-08 15:01:11 +00:00
ARM
Hexagon	[Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly.	2015-06-10 16:52:32 +00:00
Mips	[mips][microMIPS] Implement ERET and ERETNC instructions	2015-06-11 10:22:46 +00:00
PowerPC	LLVM support for vector quad bit permute and gather instructions through builtins	2015-06-11 06:21:25 +00:00
Sparc	Sparc: Support PSR, TBR, WIM read/write instructions.	2015-05-18 16:38:47 +00:00
SystemZ	[SystemZ] Add z13 vector facility and MC support	2015-05-05 19:23:40 +00:00
X86	[X86] Fix PR23271 - RIP-relative decoding bug in disassembler.	2015-05-13 22:44:52 +00:00
XCore