llvm-6502/lib
2011-12-12 06:04:28 +00:00
..
Analysis Switch llvm.cttz and llvm.ctlz to accept a second i1 parameter which 2011-12-12 04:26:04 +00:00
Archive
AsmParser
Bitcode
CodeGen [fast-isel] SelectInsertValue seems to be causing miscompiles for ARM. Disable while I investigate. 2011-12-10 21:27:40 +00:00
DebugInfo
ExecutionEngine ExecutionEngine: refactor interface 2011-12-12 04:20:36 +00:00
Linker
MC Handle reloc_signed_4byte in here. Not doing so was a regression from my 2011-12-09 19:57:29 +00:00
Object
Support Support/FileSystem: Implement bool equivalent(file_status A, file_status B); 2011-12-12 06:04:28 +00:00
TableGen
Target Remove some remants of the old palign pattern fragment that were still hanging around. Also remove a cast from inside getShuffleVPERM2X128Immediate and getShuffleVPERMILPImmediate since the only caller already had done the cast. 2011-12-11 19:12:35 +00:00
Transforms Switch llvm.cttz and llvm.ctlz to accept a second i1 parameter which 2011-12-12 04:26:04 +00:00
VMCore Teach the verifier to reject all non-constant arguments to the second 2011-12-12 04:36:02 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile