Krzysztof Parzyszek d496e176f0 [Hexagon] Generate instructions for operations on predicate registers ... Convert logical operations on general-purpose registers to the correspon- ding operations on predicate registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242186 91177308-0d34-0410-b5e6-96231b3b80d8		2015-07-14 19:30:21 +00:00
..
Analysis	Cleanup after r241809 - remove uncessary call to std::sort	2015-07-13 14:48:24 +00:00
Assembler
Bindings
Bitcode	Add argmemonly attribute.	2015-07-11 10:30:36 +00:00
BugPoint
CodeGen	[Hexagon] Generate instructions for operations on predicate registers	2015-07-14 19:30:21 +00:00
DebugInfo
ExecutionEngine
Feature	Revert the new EH instructions	2015-07-10 07:15:17 +00:00
FileCheck
Instrumentation
Integer
JitListener
LibDriver
Linker
LTO
MC	AArch64: add rev64 alias for 64-bit rev instruction.	2015-07-14 17:07:29 +00:00
Object	llvm-ar: Don't try to extract from thin archives.	2015-07-14 16:55:13 +00:00
Other
SymbolRewriter
TableGen
tools
Transforms	[SROA] Don't de-atomic volatile loads and stores	2015-07-14 06:19:58 +00:00
Unit
Verifier	Revert the new EH instructions	2015-07-10 07:15:17 +00:00
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh