llvm-6502/test/CodeGen
Jim Grosbach d4a16ad85d Properly pseudo-ize MOVCCr and MOVCCs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127434 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10 23:56:09 +00:00
..
Alpha
ARM Properly pseudo-ize MOVCCr and MOVCCs. 2011-03-10 23:56:09 +00:00
Blackfin Be nice to Xcore and the XMOS assembler and avoid quoting section names 2011-03-04 20:03:14 +00:00
CBackend
CellSPU Fix mistyped CHECK lines. 2011-03-09 22:07:31 +00:00
CPP
Generic Make this test x86 specific because the ARM backend can't handle it. 2011-02-28 12:30:47 +00:00
MBlaze fix visitShift to properly zero extend the shift amount if the provided operand 2011-02-13 09:02:52 +00:00
Mips Revert "Re-enable test and hope to silence the buildbots", still broken. 2011-03-09 22:48:46 +00:00
MSP430 Enhance ComputeMaskedBits to know that aligned frameindexes 2011-02-13 22:25:43 +00:00
PowerPC Fix mistyped CHECK lines. 2011-03-09 22:07:31 +00:00
PTX PTX: Add preliminary support for floating-point divide and multiply-and-add 2011-03-10 16:57:18 +00:00
SPARC Generate correct Sparc32 ABI compliant code for functions that return a struct. 2011-02-21 03:42:44 +00:00
SystemZ
Thumb Sorry, several patches in one. 2011-01-20 08:34:58 +00:00
Thumb2 Move a test that ended up in the wrong place. 2011-02-05 04:15:50 +00:00
X86 Revert 127359; it broke lencod. 2011-03-10 00:25:53 +00:00
XCore Fix mistyped CHECK lines. 2011-03-09 22:07:31 +00:00