Daniel Sanders ae1fb8fc19 [mips][msa] Added support for matching comparisons from normal IR (i.e. not intrinsics) ... MIPS SelectionDAG changes: * Added VCEQ, VCL[ET]_[SU] nodes to represent vector comparisons that produce a bitmask. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191286 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-24 10:46:19 +00:00
..
AArch64	llvm/test/CodeGen/AArch64/neon-scalar-reduce-pairwise.ll: Use -mtriple here, or aach64-pecoff might be misassumed on win32 hosts.	2013-09-24 04:14:29 +00:00
ARM	Initialize BSSSection explicitly in InitMachOMCObjectFileInfo() to appease msvc.	2013-09-21 02:34:45 +00:00
CPP
Generic
Hexagon	Debug Info Testing: use null instead of an empty string in context field.	2013-09-09 00:12:17 +00:00
Inputs
Mips	[mips][msa] Added support for matching comparisons from normal IR (i.e. not intrinsics)	2013-09-24 10:46:19 +00:00
MSP430
NVPTX	[NVPTX] Make constant vector test case endian-independent	2013-09-19 13:14:44 +00:00
PowerPC	[PowerPC] Fix problems with large code model (PR17169).	2013-09-17 20:03:25 +00:00
R600	R600: Move code handling literal folding into R600ISelLowering.	2013-09-12 23:44:53 +00:00
SPARC	[Sparc] Add support for TLS in sparc.	2013-09-22 06:48:52 +00:00
SystemZ	[SystemZ] Add unsigned compare-and-branch instructions	2013-09-18 09:56:40 +00:00
Thumb	ARM: Use "dmb sy" for barriers on M-class CPUs	2013-08-28 14:39:19 +00:00
Thumb2	[ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.	2013-09-09 14:21:49 +00:00
X86	[stackprotector] Forgot to add in PR number to test case.	2013-09-24 02:10:55 +00:00
XCore	XCore handling of thread local lowering	2013-09-09 10:42:11 +00:00