Rafael Espindola dd86e54b61 All backends use MC now. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198959 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-10 21:49:27 +00:00
..
CostTable.h	Add a overload to CostTable which allows it to infer the size of the table.	2013-08-09 19:33:32 +00:00
Target.td	All backends use MC now.	2014-01-10 21:49:27 +00:00
TargetCallingConv.h	SelectionDAG: Pass along the original argument/element type in ISD::InputArg	2013-10-23 00:44:24 +00:00
TargetCallingConv.td	Add an OtherPreserved field to the CalleeSaved TableGen class.	2013-08-23 02:25:47 +00:00
TargetFrameLowering.h	[SystemZ] Clean up register scavenging code	2013-07-05 12:55:00 +00:00
TargetInstrInfo.h	Added a size field to the stack map record to handle subregister spills.	2013-11-17 01:36:23 +00:00
TargetIntrinsicInfo.h
TargetItinerary.td
TargetJITInfo.h	Sort the #include lines for the include/... tree with the script.	2012-12-03 17:02:12 +00:00
TargetLibraryInfo.h	Enable double to float shrinking optimizations for binary functions like 'fmin/fmax'. Fix radar:15283121	2013-12-16 22:42:40 +00:00
TargetLowering.h	Refactor function that checks that __builtin_returnaddress's argument is constant.	2014-01-06 00:43:20 +00:00
TargetLoweringObjectFile.h	Make the llvm mangler depend only on DataLayout.	2014-01-03 19:21:54 +00:00
TargetMachine.h	Add a RequireStructuredCFG Field to TargetMachine.	2013-12-07 01:49:19 +00:00
TargetOpcodes.h	Lower stackmap intrinsics directly to their target opcode in the DAG builder.	2013-10-31 17:18:24 +00:00
TargetOptions.h	Use function attributes to indicate that we don't want to realign the stack.	2013-08-01 21:42:05 +00:00
TargetRegisterInfo.h	Add TargetRegisterInfo::reverseLocalAssignment hook.	2013-12-11 03:40:15 +00:00
TargetSchedule.td	Machine model comments. Explain a ProcessorUnit's BufferSize.	2013-12-05 17:55:53 +00:00
TargetSelectionDAG.td	Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions:	2013-09-04 09:28:24 +00:00
TargetSelectionDAGInfo.h	[SystemZ] Use SRST to optimize memchr	2013-08-20 09:38:48 +00:00
TargetSubtargetInfo.h	Added temp flag -misched-bench for staging in default changes.	2013-09-26 05:53:35 +00:00