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https://github.com/c64scene-ar/llvm-6502.git
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538287dea2
The ABI allows sub-128 vectors to be passed and returned in registers, with the vector occupying the upper part of a register. We therefore want to legalize those types by widening the vector rather than promoting the elements. The patch includes some simple tests for sub-128 vectors and also tests that we can recognize various pack sequences, some of which use sub-128 vectors as temporary results. One of these forms is based on the pack sequences generated by llvmpipe when no intrinsics are used. Signed unpacks are recognized as BUILD_VECTORs whose elements are individually sign-extended. Unsigned unpacks can have the equivalent form with zero extension, but they also occur as shuffles in which some elements are zero. Based on a patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236525 91177308-0d34-0410-b5e6-96231b3b80d8
85 lines
2.9 KiB
C++
85 lines
2.9 KiB
C++
//===-- SystemZCallingConv.h - Calling conventions for SystemZ --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZCALLINGCONV_H
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#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZCALLINGCONV_H
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/CallingConvLower.h"
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namespace llvm {
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namespace SystemZ {
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const unsigned NumArgGPRs = 5;
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extern const unsigned ArgGPRs[NumArgGPRs];
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const unsigned NumArgFPRs = 4;
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extern const unsigned ArgFPRs[NumArgFPRs];
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} // end namespace SystemZ
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class SystemZCCState : public CCState {
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private:
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/// Records whether the value was a fixed argument.
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/// See ISD::OutputArg::IsFixed.
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SmallVector<bool, 4> ArgIsFixed;
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/// Records whether the value was widened from a short vector type.
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SmallVector<bool, 4> ArgIsShortVector;
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// Check whether ArgVT is a short vector type.
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bool IsShortVectorType(EVT ArgVT) {
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return ArgVT.isVector() && ArgVT.getStoreSize() <= 8;
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}
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public:
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SystemZCCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
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SmallVectorImpl<CCValAssign> &locs, LLVMContext &C)
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: CCState(CC, isVarArg, MF, locs, C) {}
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void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
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CCAssignFn Fn) {
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// Formal arguments are always fixed.
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ArgIsFixed.clear();
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for (unsigned i = 0; i < Ins.size(); ++i)
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ArgIsFixed.push_back(true);
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// Record whether the call operand was a short vector.
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ArgIsShortVector.clear();
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for (unsigned i = 0; i < Ins.size(); ++i)
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ArgIsShortVector.push_back(IsShortVectorType(Ins[i].ArgVT));
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CCState::AnalyzeFormalArguments(Ins, Fn);
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}
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void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
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CCAssignFn Fn) {
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// Record whether the call operand was a fixed argument.
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ArgIsFixed.clear();
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for (unsigned i = 0; i < Outs.size(); ++i)
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ArgIsFixed.push_back(Outs[i].IsFixed);
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// Record whether the call operand was a short vector.
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ArgIsShortVector.clear();
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for (unsigned i = 0; i < Outs.size(); ++i)
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ArgIsShortVector.push_back(IsShortVectorType(Outs[i].ArgVT));
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CCState::AnalyzeCallOperands(Outs, Fn);
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}
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// This version of AnalyzeCallOperands in the base class is not usable
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// since we must provide a means of accessing ISD::OutputArg::IsFixed.
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void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
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SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
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CCAssignFn Fn) = delete;
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bool IsFixed(unsigned ValNo) { return ArgIsFixed[ValNo]; }
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bool IsShortVector(unsigned ValNo) { return ArgIsShortVector[ValNo]; }
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};
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} // end namespace llvm
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#endif
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