llvm-6502/test/CodeGen/Mips
Akira Hatanaka de5a0b65c2 Modify MipsFrameLowering::emitPrologue and emitEpilogue.
- Use MipsAnalyzeImmediate to expand immediates that do not fit in 16-bit.
- Change the types of variables so that they are sufficiently large to handle
  64-bit pointers.
- Emit instructions to set register $28 in a function prologue after
  instructions which store callee-saved registers have been emitted. 
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148917 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 04:12:04 +00:00
..
2008-06-05-Carry.ll
2008-07-03-SRet.ll
2008-07-06-fadd64.ll
2008-07-07-Float2Int.ll
2008-07-07-FPExtend.ll
2008-07-07-IntDoubleConvertions.ll
2008-07-15-InternalConstant.ll
2008-07-15-SmallSection.ll
2008-07-16-SignExtInReg.ll 64-bit sign extension in register instructions. 2012-01-24 21:41:09 +00:00
2008-07-22-Cstpool.ll
2008-07-23-fpcmp.ll
2008-07-29-icmp.ll
2008-07-31-fcopysign.ll
2008-08-01-AsmInline.ll Have getRegForInlineAsmConstraint return the correct register class when target 2012-01-04 02:45:01 +00:00
2008-08-03-fabs64.ll
2008-08-03-ReturnDouble.ll
2008-08-04-Bitconvert.ll
2008-08-06-Alloca.ll
2008-08-07-CC.ll
2008-08-07-FPRound.ll
2008-08-08-bswap.ll
2008-08-08-ctlz.ll
2008-10-13-LegalizerBug.ll
2008-11-10-xint_to_fp.ll
2009-11-16-CstPoolLoad.ll
2010-04-07-DbgValueOtherTargets.ll
2010-07-20-Switch.ll
2010-11-09-CountLeading.ll
2010-11-09-Mul.ll
2011-05-26-BranchKillsVreg.ll
addc.ll
alloca.ll
analyzebranch.ll
atomic.ll
blockaddr.ll
br-jmp.ll
brdelayslot.ll
bswap.ll Test case for r147017. 2011-12-20 23:58:36 +00:00
buildpairextractelementf64.ll
cmov.ll
constantfp0.ll
cprestore.ll
dg.exp
divrem.ll
double2int.ll
eh.ll
extins.ll
fcopysign.ll Add patterns for matching immediates whose lower 16-bit is cleared. These 2011-12-19 20:21:18 +00:00
fpbr.ll
frame-address.ll
gprestore.ll
i64arg.ll
imm.ll Add a test case for r146900. 2011-12-19 20:24:28 +00:00
indirectcall.ll
inlineasm64.ll Have getRegForInlineAsmConstraint return the correct register class when target 2012-01-04 02:45:01 +00:00
inlineasmmemop.ll
internalfunc.ll
largeimm1.ll
largeimmprinting.ll Modify MipsFrameLowering::emitPrologue and emitEpilogue. 2012-01-25 04:12:04 +00:00
madd-msub.ll
mips64countleading.ll Expand 64-bit CTLZ nodes if target architecture does not support it. Add test 2011-12-21 00:20:27 +00:00
mips64directive.ll 64-bit data directive. 2011-12-20 22:52:19 +00:00
mips64ext.ll Pattern for f32 to i64 conversion. 2012-01-24 22:05:25 +00:00
mips64extins.ll
mips64fpimm0.ll Add code in MipsDAGToDAGISel for selecting constant +0.0. 2011-12-20 22:25:50 +00:00
mips64fpldst.ll
mips64imm.ll Lower 64-bit immediates using MipsAnalyzeImmediate that has just been added. 2012-01-25 03:01:35 +00:00
mips64instrs.ll
mips64intldst.ll
mips64lea.ll Test case for r147232. 2011-12-24 03:05:43 +00:00
mips64muldiv.ll Add function MipsDAGToDAGISel::SelectMULT and factor out code that generates 2011-12-20 23:10:57 +00:00
mips64shift.ll Remove definitions of double word shift plus 32 instructions. Assembler or 2011-12-19 19:44:09 +00:00
mipslopat.ll
o32_cc_byval.ll
o32_cc_vararg.ll
o32_cc.ll
private.ll
rotate.ll
select.ll
swzero.ll Fix bug in zero-store peephole pattern reported in pr11615. 2011-12-21 00:31:10 +00:00
tls.ll
unalignedload.ll
weak.ll