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LLVM backend for 6502
d59fc0af0a
I believe the full "dmb ish" barrier is not required to guarantee release semantics for atomic operations. The weaker "dmb ishst" prevents previous operations being reordered with a store executed afterwards, which is enough. A key point to note (fortunately already correct) is that this barrier alone is *insufficient* for sequential consistency, no matter how liberally placed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185339 91177308-0d34-0410-b5e6-96231b3b80d8 |
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utils | ||
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LICENSE.TXT | ||
llvm.spec.in | ||
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Makefile.common | ||
Makefile.config.in | ||
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README.txt |
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