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https://github.com/c64scene-ar/llvm-6502.git
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b503b49b51
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
129 lines
2.8 KiB
LLVM
129 lines
2.8 KiB
LLVM
; Test 32-bit additions of constants to memory.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check additions of 1.
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define void @f1(i32 *%ptr) {
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; CHECK: f1:
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; CHECK: asi 0(%r2), 1
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; CHECK: br %r14
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%val = load i32 *%ptr
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%add = add i32 %val, 127
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store i32 %add, i32 *%ptr
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ret void
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}
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; Check the high end of the constant range.
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define void @f2(i32 *%ptr) {
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; CHECK: f2:
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; CHECK: asi 0(%r2), 127
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; CHECK: br %r14
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%val = load i32 *%ptr
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%add = add i32 %val, 127
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store i32 %add, i32 *%ptr
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ret void
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}
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; Check the next constant up, which must use an addition and a store.
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; Both L/AHI and LHI/A would be OK.
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define void @f3(i32 *%ptr) {
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; CHECK: f3:
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; CHECK-NOT: asi
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; CHECK: st %r0, 0(%r2)
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; CHECK: br %r14
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%val = load i32 *%ptr
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%add = add i32 %val, 128
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store i32 %add, i32 *%ptr
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ret void
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}
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; Check the low end of the constant range.
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define void @f4(i32 *%ptr) {
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; CHECK: f4:
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; CHECK: asi 0(%r2), -128
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; CHECK: br %r14
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%val = load i32 *%ptr
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%add = add i32 %val, -128
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store i32 %add, i32 *%ptr
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ret void
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}
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; Check the next value down, with the same comment as f3.
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define void @f5(i32 *%ptr) {
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; CHECK: f5:
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; CHECK-NOT: asi
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; CHECK: st %r0, 0(%r2)
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; CHECK: br %r14
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%val = load i32 *%ptr
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%add = add i32 %val, -129
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store i32 %add, i32 *%ptr
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ret void
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}
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; Check the high end of the aligned ASI range.
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define void @f6(i32 *%base) {
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; CHECK: f6:
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; CHECK: asi 524284(%r2), 1
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 131071
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%val = load i32 *%ptr
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%add = add i32 %val, 1
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store i32 %add, i32 *%ptr
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ret void
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}
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; Check the next word up, which must use separate address logic.
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; Other sequences besides this one would be OK.
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define void @f7(i32 *%base) {
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; CHECK: f7:
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; CHECK: agfi %r2, 524288
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; CHECK: asi 0(%r2), 1
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 131072
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%val = load i32 *%ptr
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%add = add i32 %val, 1
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store i32 %add, i32 *%ptr
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ret void
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}
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; Check the low end of the ASI range.
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define void @f8(i32 *%base) {
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; CHECK: f8:
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; CHECK: asi -524288(%r2), 1
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 -131072
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%val = load i32 *%ptr
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%add = add i32 %val, 1
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store i32 %add, i32 *%ptr
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ret void
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}
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; Check the next word down, which must use separate address logic.
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; Other sequences besides this one would be OK.
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define void @f9(i32 *%base) {
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; CHECK: f9:
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; CHECK: agfi %r2, -524292
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; CHECK: asi 0(%r2), 1
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 -131073
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%val = load i32 *%ptr
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%add = add i32 %val, 1
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store i32 %add, i32 *%ptr
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ret void
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}
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; Check that ASI does not allow indices.
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define void @f10(i64 %base, i64 %index) {
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; CHECK: f10:
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; CHECK: agr %r2, %r3
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; CHECK: asi 4(%r2), 1
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; CHECK: br %r14
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%add1 = add i64 %base, %index
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%add2 = add i64 %add1, 4
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%ptr = inttoptr i64 %add2 to i32 *
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%val = load i32 *%ptr
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%add = add i32 %val, 1
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store i32 %add, i32 *%ptr
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ret void
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}
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