mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
5a70dd1d82
Similar to gep (r230786) and load (r230794) changes.
Similar migration script can be used to update test cases, which
successfully migrated all of LLVM and Polly, but about 4 test cases
needed manually changes in Clang.
(this script will read the contents of stdin and massage it into stdout
- wrap it in the 'apply.sh' script shown in previous commits + xargs to
apply it over a large set of test cases)
import fileinput
import sys
import re
rep = re.compile(r"(getelementptr(?:\s+inbounds)?\s*\()((<\d*\s+x\s+)?([^@]*?)(|\s*addrspace\(\d+\))\s*\*(?(3)>)\s*)(?=$|%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|zeroinitializer|<|\[\[[a-zA-Z]|\{\{)", re.MULTILINE | re.DOTALL)
def conv(match):
line = match.group(1)
line += match.group(4)
line += ", "
line += match.group(2)
return line
line = sys.stdin.read()
off = 0
for match in re.finditer(rep, line):
sys.stdout.write(line[off:match.start()])
sys.stdout.write(conv(match))
off = match.end()
sys.stdout.write(line[off:])
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232184 91177308-0d34-0410-b5e6-96231b3b80d8
95 lines
3.8 KiB
LLVM
95 lines
3.8 KiB
LLVM
;RUN: llc < %s -march=r600 -mcpu=cayman -stress-sched -verify-misched -verify-machineinstrs
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;REQUIRES: asserts
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define void @main() {
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main_body:
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%0 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
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%1 = extractelement <4 x float> %0, i32 0
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%2 = fadd float 1.000000e+03, %1
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%3 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
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%4 = extractelement <4 x float> %3, i32 0
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%5 = bitcast float %4 to i32
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%6 = icmp eq i32 %5, 0
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%7 = sext i1 %6 to i32
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%8 = bitcast i32 %7 to float
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%9 = bitcast float %8 to i32
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%10 = icmp ne i32 %9, 0
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br i1 %10, label %IF, label %ELSE
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IF: ; preds = %main_body
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%11 = call float @fabs(float %2)
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%12 = fcmp ueq float %11, 0x7FF0000000000000
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%13 = select i1 %12, float 1.000000e+00, float 0.000000e+00
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%14 = fsub float -0.000000e+00, %13
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%15 = fptosi float %14 to i32
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%16 = bitcast i32 %15 to float
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%17 = bitcast float %16 to i32
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%18 = icmp ne i32 %17, 0
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%. = select i1 %18, float 0x36A0000000000000, float 0.000000e+00
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%19 = fcmp une float %2, %2
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%20 = select i1 %19, float 1.000000e+00, float 0.000000e+00
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%21 = fsub float -0.000000e+00, %20
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%22 = fptosi float %21 to i32
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%23 = bitcast i32 %22 to float
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%24 = bitcast float %23 to i32
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%25 = icmp ne i32 %24, 0
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%temp8.0 = select i1 %25, float 0x36A0000000000000, float 0.000000e+00
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%26 = bitcast float %. to i32
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%27 = sitofp i32 %26 to float
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%28 = bitcast float %temp8.0 to i32
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%29 = sitofp i32 %28 to float
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%30 = fcmp ugt float %2, 0.000000e+00
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%31 = select i1 %30, float 1.000000e+00, float %2
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%32 = fcmp uge float %31, 0.000000e+00
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%33 = select i1 %32, float %31, float -1.000000e+00
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%34 = fadd float %33, 1.000000e+00
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%35 = fmul float %34, 5.000000e-01
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br label %ENDIF
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ELSE: ; preds = %main_body
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%36 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
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%37 = extractelement <4 x float> %36, i32 0
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%38 = bitcast float %37 to i32
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%39 = icmp eq i32 %38, 1
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%40 = sext i1 %39 to i32
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%41 = bitcast i32 %40 to float
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%42 = bitcast float %41 to i32
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%43 = icmp ne i32 %42, 0
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br i1 %43, label %IF23, label %ENDIF
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ENDIF: ; preds = %IF23, %ELSE, %IF
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%temp4.0 = phi float [ %2, %IF ], [ %56, %IF23 ], [ 0.000000e+00, %ELSE ]
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%temp5.0 = phi float [ %27, %IF ], [ %60, %IF23 ], [ 0.000000e+00, %ELSE ]
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%temp6.0 = phi float [ %29, %IF ], [ 0.000000e+00, %ELSE ], [ 0.000000e+00, %IF23 ]
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%temp7.0 = phi float [ %35, %IF ], [ 0.000000e+00, %ELSE ], [ 0.000000e+00, %IF23 ]
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%44 = insertelement <4 x float> undef, float %temp4.0, i32 0
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%45 = insertelement <4 x float> %44, float %temp5.0, i32 1
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%46 = insertelement <4 x float> %45, float %temp6.0, i32 2
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%47 = insertelement <4 x float> %46, float %temp7.0, i32 3
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call void @llvm.R600.store.swizzle(<4 x float> %47, i32 0, i32 0)
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ret void
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IF23: ; preds = %ELSE
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%48 = fcmp ult float 0.000000e+00, %2
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%49 = select i1 %48, float 1.000000e+00, float 0.000000e+00
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%50 = fsub float -0.000000e+00, %49
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%51 = fptosi float %50 to i32
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%52 = bitcast i32 %51 to float
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%53 = bitcast float %52 to i32
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%54 = icmp ne i32 %53, 0
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%.28 = select i1 %54, float 0x36A0000000000000, float 0.000000e+00
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%55 = bitcast float %.28 to i32
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%56 = sitofp i32 %55 to float
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%57 = load <4 x float>, <4 x float> addrspace(8)* null
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%58 = extractelement <4 x float> %57, i32 0
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%59 = fsub float -0.000000e+00, %58
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%60 = fadd float %2, %59
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br label %ENDIF
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}
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declare float @fabs(float) #0
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declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
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attributes #0 = { readonly }
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