mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 04:30:12 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
393 lines
12 KiB
LLVM
393 lines
12 KiB
LLVM
; RUN: llc < %s -march armeb -mtriple arm-eabi -mattr v7,neon -float-abi soft -o - | FileCheck %s
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; RUN: llc < %s -march armeb -mtriple arm-eabi -mattr v7,neon -float-abi hard -o - | FileCheck %s -check-prefix CHECK-HARD
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@v2i64 = global <2 x i64> zeroinitializer
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@v2i32 = global <2 x i32> zeroinitializer
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@v4i32 = global <4 x i32> zeroinitializer
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@v4i16 = global <4 x i16> zeroinitializer
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@v8i16 = global <8 x i16> zeroinitializer
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@v8i8 = global <8 x i8> zeroinitializer
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@v16i8 = global <16 x i8> zeroinitializer
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@v2f32 = global <2 x float> zeroinitializer
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@v2f64 = global <2 x double> zeroinitializer
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@v4f32 = global <4 x float> zeroinitializer
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; 64 bit conversions
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define void @conv_i64_to_v8i8( i64 %val, <8 x i8>* %store ) {
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; CHECK-LABEL: conv_i64_to_v8i8:
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; CHECK: vrev64.8
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%v = bitcast i64 %val to <8 x i8>
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%w = load <8 x i8>, <8 x i8>* @v8i8
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%a = add <8 x i8> %v, %w
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store <8 x i8> %a, <8 x i8>* %store
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ret void
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}
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define void @conv_v8i8_to_i64( <8 x i8>* %load, <8 x i8>* %store ) {
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; CHECK-LABEL: conv_v8i8_to_i64:
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; CHECK: vrev64.8
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%v = load <8 x i8>, <8 x i8>* %load
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%w = load <8 x i8>, <8 x i8>* @v8i8
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%a = add <8 x i8> %v, %w
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%f = bitcast <8 x i8> %a to i64
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call void @conv_i64_to_v8i8( i64 %f, <8 x i8>* %store )
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ret void
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}
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define void @conv_i64_to_v4i16( i64 %val, <4 x i16>* %store ) {
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; CHECK-LABEL: conv_i64_to_v4i16:
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; CHECK: vrev64.16
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%v = bitcast i64 %val to <4 x i16>
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%w = load <4 x i16>, <4 x i16>* @v4i16
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%a = add <4 x i16> %v, %w
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store <4 x i16> %a, <4 x i16>* %store
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ret void
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}
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define void @conv_v4i16_to_i64( <4 x i16>* %load, <4 x i16>* %store ) {
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; CHECK-LABEL: conv_v4i16_to_i64:
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; CHECK: vrev64.16
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%v = load <4 x i16>, <4 x i16>* %load
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%w = load <4 x i16>, <4 x i16>* @v4i16
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%a = add <4 x i16> %v, %w
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%f = bitcast <4 x i16> %a to i64
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call void @conv_i64_to_v4i16( i64 %f, <4 x i16>* %store )
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ret void
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}
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define void @conv_i64_to_v2i32( i64 %val, <2 x i32>* %store ) {
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; CHECK-LABEL: conv_i64_to_v2i32:
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; CHECK: vrev64.32
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%v = bitcast i64 %val to <2 x i32>
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%w = load <2 x i32>, <2 x i32>* @v2i32
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%a = add <2 x i32> %v, %w
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store <2 x i32> %a, <2 x i32>* %store
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ret void
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}
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define void @conv_v2i32_to_i64( <2 x i32>* %load, <2 x i32>* %store ) {
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; CHECK-LABEL: conv_v2i32_to_i64:
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; CHECK: vrev64.32
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%v = load <2 x i32>, <2 x i32>* %load
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%w = load <2 x i32>, <2 x i32>* @v2i32
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%a = add <2 x i32> %v, %w
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%f = bitcast <2 x i32> %a to i64
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call void @conv_i64_to_v2i32( i64 %f, <2 x i32>* %store )
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ret void
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}
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define void @conv_i64_to_v2f32( i64 %val, <2 x float>* %store ) {
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; CHECK-LABEL: conv_i64_to_v2f32:
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; CHECK: vrev64.32
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%v = bitcast i64 %val to <2 x float>
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%w = load <2 x float>, <2 x float>* @v2f32
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%a = fadd <2 x float> %v, %w
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store <2 x float> %a, <2 x float>* %store
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ret void
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}
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define void @conv_v2f32_to_i64( <2 x float>* %load, <2 x float>* %store ) {
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; CHECK-LABEL: conv_v2f32_to_i64:
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; CHECK: vrev64.32
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%v = load <2 x float>, <2 x float>* %load
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%w = load <2 x float>, <2 x float>* @v2f32
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%a = fadd <2 x float> %v, %w
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%f = bitcast <2 x float> %a to i64
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call void @conv_i64_to_v2f32( i64 %f, <2 x float>* %store )
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ret void
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}
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define void @conv_f64_to_v8i8( double %val, <8 x i8>* %store ) {
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; CHECK-LABEL: conv_f64_to_v8i8:
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; CHECK: vrev64.8
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%v = bitcast double %val to <8 x i8>
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%w = load <8 x i8>, <8 x i8>* @v8i8
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%a = add <8 x i8> %v, %w
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store <8 x i8> %a, <8 x i8>* %store
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ret void
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}
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define void @conv_v8i8_to_f64( <8 x i8>* %load, <8 x i8>* %store ) {
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; CHECK-LABEL: conv_v8i8_to_f64:
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; CHECK: vrev64.8
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%v = load <8 x i8>, <8 x i8>* %load
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%w = load <8 x i8>, <8 x i8>* @v8i8
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%a = add <8 x i8> %v, %w
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%f = bitcast <8 x i8> %a to double
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call void @conv_f64_to_v8i8( double %f, <8 x i8>* %store )
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ret void
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}
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define void @conv_f64_to_v4i16( double %val, <4 x i16>* %store ) {
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; CHECK-LABEL: conv_f64_to_v4i16:
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; CHECK: vrev64.16
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%v = bitcast double %val to <4 x i16>
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%w = load <4 x i16>, <4 x i16>* @v4i16
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%a = add <4 x i16> %v, %w
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store <4 x i16> %a, <4 x i16>* %store
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ret void
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}
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define void @conv_v4i16_to_f64( <4 x i16>* %load, <4 x i16>* %store ) {
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; CHECK-LABEL: conv_v4i16_to_f64:
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; CHECK: vrev64.16
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%v = load <4 x i16>, <4 x i16>* %load
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%w = load <4 x i16>, <4 x i16>* @v4i16
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%a = add <4 x i16> %v, %w
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%f = bitcast <4 x i16> %a to double
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call void @conv_f64_to_v4i16( double %f, <4 x i16>* %store )
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ret void
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}
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define void @conv_f64_to_v2i32( double %val, <2 x i32>* %store ) {
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; CHECK-LABEL: conv_f64_to_v2i32:
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; CHECK: vrev64.32
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%v = bitcast double %val to <2 x i32>
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%w = load <2 x i32>, <2 x i32>* @v2i32
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%a = add <2 x i32> %v, %w
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store <2 x i32> %a, <2 x i32>* %store
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ret void
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}
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define void @conv_v2i32_to_f64( <2 x i32>* %load, <2 x i32>* %store ) {
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; CHECK-LABEL: conv_v2i32_to_f64:
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; CHECK: vrev64.32
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%v = load <2 x i32>, <2 x i32>* %load
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%w = load <2 x i32>, <2 x i32>* @v2i32
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%a = add <2 x i32> %v, %w
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%f = bitcast <2 x i32> %a to double
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call void @conv_f64_to_v2i32( double %f, <2 x i32>* %store )
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ret void
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}
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define void @conv_f64_to_v2f32( double %val, <2 x float>* %store ) {
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; CHECK-LABEL: conv_f64_to_v2f32:
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; CHECK: vrev64.32
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%v = bitcast double %val to <2 x float>
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%w = load <2 x float>, <2 x float>* @v2f32
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%a = fadd <2 x float> %v, %w
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store <2 x float> %a, <2 x float>* %store
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ret void
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}
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define void @conv_v2f32_to_f64( <2 x float>* %load, <2 x float>* %store ) {
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; CHECK-LABEL: conv_v2f32_to_f64:
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; CHECK: vrev64.32
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%v = load <2 x float>, <2 x float>* %load
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%w = load <2 x float>, <2 x float>* @v2f32
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%a = fadd <2 x float> %v, %w
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%f = bitcast <2 x float> %a to double
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call void @conv_f64_to_v2f32( double %f, <2 x float>* %store )
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ret void
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}
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; 128 bit conversions
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define void @conv_i128_to_v16i8( i128 %val, <16 x i8>* %store ) {
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; CHECK-LABEL: conv_i128_to_v16i8:
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; CHECK: vrev32.8
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%v = bitcast i128 %val to <16 x i8>
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%w = load <16 x i8>, <16 x i8>* @v16i8
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%a = add <16 x i8> %v, %w
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store <16 x i8> %a, <16 x i8>* %store
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ret void
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}
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define void @conv_v16i8_to_i128( <16 x i8>* %load, <16 x i8>* %store ) {
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; CHECK-LABEL: conv_v16i8_to_i128:
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; CHECK: vrev32.8
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%v = load <16 x i8>, <16 x i8>* %load
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%w = load <16 x i8>, <16 x i8>* @v16i8
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%a = add <16 x i8> %v, %w
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%f = bitcast <16 x i8> %a to i128
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call void @conv_i128_to_v16i8( i128 %f, <16 x i8>* %store )
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ret void
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}
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define void @conv_i128_to_v8i16( i128 %val, <8 x i16>* %store ) {
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; CHECK-LABEL: conv_i128_to_v8i16:
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; CHECK: vrev32.16
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%v = bitcast i128 %val to <8 x i16>
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%w = load <8 x i16>, <8 x i16>* @v8i16
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%a = add <8 x i16> %v, %w
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store <8 x i16> %a, <8 x i16>* %store
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ret void
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}
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define void @conv_v8i16_to_i128( <8 x i16>* %load, <8 x i16>* %store ) {
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; CHECK-LABEL: conv_v8i16_to_i128:
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; CHECK: vrev32.16
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%v = load <8 x i16>, <8 x i16>* %load
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%w = load <8 x i16>, <8 x i16>* @v8i16
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%a = add <8 x i16> %v, %w
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%f = bitcast <8 x i16> %a to i128
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call void @conv_i128_to_v8i16( i128 %f, <8 x i16>* %store )
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ret void
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}
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define void @conv_i128_to_v4i32( i128 %val, <4 x i32>* %store ) {
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; CHECK-LABEL: conv_i128_to_v4i32:
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; CHECK: vrev64.32
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%v = bitcast i128 %val to <4 x i32>
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%w = load <4 x i32>, <4 x i32>* @v4i32
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%a = add <4 x i32> %v, %w
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store <4 x i32> %a, <4 x i32>* %store
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ret void
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}
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define void @conv_v4i32_to_i128( <4 x i32>* %load, <4 x i32>* %store ) {
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; CHECK-LABEL: conv_v4i32_to_i128:
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; CHECK: vrev64.32
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%v = load <4 x i32>, <4 x i32>* %load
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%w = load <4 x i32>, <4 x i32>* @v4i32
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%a = add <4 x i32> %v, %w
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%f = bitcast <4 x i32> %a to i128
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call void @conv_i128_to_v4i32( i128 %f, <4 x i32>* %store )
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ret void
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}
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define void @conv_i128_to_v4f32( i128 %val, <4 x float>* %store ) {
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; CHECK-LABEL: conv_i128_to_v4f32:
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; CHECK: vrev64.32
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%v = bitcast i128 %val to <4 x float>
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%w = load <4 x float>, <4 x float>* @v4f32
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%a = fadd <4 x float> %v, %w
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store <4 x float> %a, <4 x float>* %store
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ret void
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}
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define void @conv_v4f32_to_i128( <4 x float>* %load, <4 x float>* %store ) {
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; CHECK-LABEL: conv_v4f32_to_i128:
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; CHECK: vrev64.32
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%v = load <4 x float>, <4 x float>* %load
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%w = load <4 x float>, <4 x float>* @v4f32
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%a = fadd <4 x float> %v, %w
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%f = bitcast <4 x float> %a to i128
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call void @conv_i128_to_v4f32( i128 %f, <4 x float>* %store )
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ret void
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}
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define void @conv_f128_to_v2f64( fp128 %val, <2 x double>* %store ) {
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; CHECK-LABEL: conv_f128_to_v2f64:
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; CHECK: vrev64.32
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%v = bitcast fp128 %val to <2 x double>
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%w = load <2 x double>, <2 x double>* @v2f64
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%a = fadd <2 x double> %v, %w
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store <2 x double> %a, <2 x double>* %store
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ret void
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}
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define void @conv_v2f64_to_f128( <2 x double>* %load, <2 x double>* %store ) {
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; CHECK-LABEL: conv_v2f64_to_f128:
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; CHECK: vrev64.32
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%v = load <2 x double>, <2 x double>* %load
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%w = load <2 x double>, <2 x double>* @v2f64
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%a = fadd <2 x double> %v, %w
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%f = bitcast <2 x double> %a to fp128
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call void @conv_f128_to_v2f64( fp128 %f, <2 x double>* %store )
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ret void
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}
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define void @conv_f128_to_v16i8( fp128 %val, <16 x i8>* %store ) {
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; CHECK-LABEL: conv_f128_to_v16i8:
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; CHECK: vrev32.8
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%v = bitcast fp128 %val to <16 x i8>
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%w = load <16 x i8>, <16 x i8>* @v16i8
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%a = add <16 x i8> %v, %w
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store <16 x i8> %a, <16 x i8>* %store
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ret void
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}
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define void @conv_v16i8_to_f128( <16 x i8>* %load, <16 x i8>* %store ) {
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; CHECK-LABEL: conv_v16i8_to_f128:
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; CHECK: vrev32.8
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%v = load <16 x i8>, <16 x i8>* %load
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%w = load <16 x i8>, <16 x i8>* @v16i8
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%a = add <16 x i8> %v, %w
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%f = bitcast <16 x i8> %a to fp128
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call void @conv_f128_to_v16i8( fp128 %f, <16 x i8>* %store )
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ret void
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}
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define void @conv_f128_to_v8i16( fp128 %val, <8 x i16>* %store ) {
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; CHECK-LABEL: conv_f128_to_v8i16:
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; CHECK: vrev32.16
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%v = bitcast fp128 %val to <8 x i16>
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%w = load <8 x i16>, <8 x i16>* @v8i16
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%a = add <8 x i16> %v, %w
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store <8 x i16> %a, <8 x i16>* %store
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ret void
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}
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define void @conv_v8i16_to_f128( <8 x i16>* %load, <8 x i16>* %store ) {
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; CHECK-LABEL: conv_v8i16_to_f128:
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; CHECK: vrev32.16
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%v = load <8 x i16>, <8 x i16>* %load
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%w = load <8 x i16>, <8 x i16>* @v8i16
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%a = add <8 x i16> %v, %w
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%f = bitcast <8 x i16> %a to fp128
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call void @conv_f128_to_v8i16( fp128 %f, <8 x i16>* %store )
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ret void
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}
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define void @conv_f128_to_v4f32( fp128 %val, <4 x float>* %store ) {
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; CHECK-LABEL: conv_f128_to_v4f32:
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; CHECK: vrev64.32
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%v = bitcast fp128 %val to <4 x float>
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%w = load <4 x float>, <4 x float>* @v4f32
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%a = fadd <4 x float> %v, %w
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store <4 x float> %a, <4 x float>* %store
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ret void
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}
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define void @conv_v4f32_to_f128( <4 x float>* %load, <4 x float>* %store ) {
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; CHECK-LABEL: conv_v4f32_to_f128:
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; CHECK: vrev64.32
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%v = load <4 x float>, <4 x float>* %load
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%w = load <4 x float>, <4 x float>* @v4f32
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%a = fadd <4 x float> %v, %w
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%f = bitcast <4 x float> %a to fp128
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call void @conv_f128_to_v4f32( fp128 %f, <4 x float>* %store )
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ret void
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}
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define void @arg_v4i32( <4 x i32> %var, <4 x i32>* %store ) {
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; CHECK-LABEL: arg_v4i32:
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; CHECK: vmov [[REG2:d[0-9]+]], r3, r2
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; CHECK: vmov [[REG1:d[0-9]+]], r1, r0
|
|
; CHECK: vst1.64 {[[REG1]], [[REG2]]},
|
|
; CHECK-HARD-LABEL: arg_v4i32:
|
|
; CHECK-HARD-NOT: vmov
|
|
; CHECK-HARD: vst1.64 {d0, d1}
|
|
store <4 x i32> %var, <4 x i32>* %store
|
|
ret void
|
|
}
|
|
|
|
define void @arg_v8i16( <8 x i16> %var, <8 x i16>* %store ) {
|
|
; CHECK-LABEL: arg_v8i16:
|
|
; CHECK: vmov [[REG2:d[0-9]+]], r3, r2
|
|
; CHECK: vmov [[REG1:d[0-9]+]], r1, r0
|
|
; CHECK: vst1.64 {[[REG1]], [[REG2]]},
|
|
; CHECK-HARD-LABEL: arg_v8i16:
|
|
; CHECK-HARD-NOT: vmov
|
|
; CHECK-HARD: vst1.64 {d0, d1}
|
|
store <8 x i16> %var, <8 x i16>* %store
|
|
ret void
|
|
}
|
|
|
|
define void @arg_v16i8( <16 x i8> %var, <16 x i8>* %store ) {
|
|
; CHECK-LABEL: arg_v16i8:
|
|
; CHECK: vmov [[REG2:d[0-9]+]], r3, r2
|
|
; CHECK: vmov [[REG1:d[0-9]+]], r1, r0
|
|
; CHECK: vst1.64 {[[REG1]], [[REG2]]},
|
|
; CHECK-HARD-LABEL: arg_v16i8:
|
|
; CHECK-HARD-NOT: vmov
|
|
; CHECK-HARD: vst1.64 {d0, d1}
|
|
store <16 x i8> %var, <16 x i8>* %store
|
|
ret void
|
|
}
|
|
|