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https://github.com/c64scene-ar/llvm-6502.git
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27b1252c13
This changes the tests that were targeting ARM EABI to explicitly specify the environment rather than relying on the default. This breaks with the new Windows on ARM support when running the tests on Windows where the default environment is no longer EABI. Take the opportunity to avoid a pointless redirect (helps when trying to debug with providing a command line invocation which can be copy and pasted) and removing a few greps in favour of FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205541 91177308-0d34-0410-b5e6-96231b3b80d8
86 lines
1.6 KiB
LLVM
86 lines
1.6 KiB
LLVM
; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s
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define i32 @t9(i32 %v) nounwind readnone {
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entry:
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; CHECK-LABEL: t9:
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; CHECK: add r0, r0, r0, lsl #3
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%0 = mul i32 %v, 9
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ret i32 %0
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}
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define i32 @t7(i32 %v) nounwind readnone {
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entry:
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; CHECK-LABEL: t7:
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; CHECK: rsb r0, r0, r0, lsl #3
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%0 = mul i32 %v, 7
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ret i32 %0
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}
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define i32 @t5(i32 %v) nounwind readnone {
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entry:
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; CHECK-LABEL: t5:
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; CHECK: add r0, r0, r0, lsl #2
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%0 = mul i32 %v, 5
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ret i32 %0
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}
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define i32 @t3(i32 %v) nounwind readnone {
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entry:
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; CHECK-LABEL: t3:
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; CHECK: add r0, r0, r0, lsl #1
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%0 = mul i32 %v, 3
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ret i32 %0
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}
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define i32 @t12288(i32 %v) nounwind readnone {
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entry:
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; CHECK-LABEL: t12288:
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; CHECK: add r0, r0, r0, lsl #1
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; CHECK: lsl{{.*}}#12
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%0 = mul i32 %v, 12288
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ret i32 %0
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}
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define i32 @tn9(i32 %v) nounwind readnone {
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entry:
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; CHECK-LABEL: tn9:
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; CHECK: add r0, r0, r0, lsl #3
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; CHECK: rsb r0, r0, #0
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%0 = mul i32 %v, -9
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ret i32 %0
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}
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define i32 @tn7(i32 %v) nounwind readnone {
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entry:
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; CHECK-LABEL: tn7:
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; CHECK: sub r0, r0, r0, lsl #3
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%0 = mul i32 %v, -7
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ret i32 %0
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}
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define i32 @tn5(i32 %v) nounwind readnone {
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entry:
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; CHECK-LABEL: tn5:
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; CHECK: add r0, r0, r0, lsl #2
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; CHECK: rsb r0, r0, #0
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%0 = mul i32 %v, -5
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ret i32 %0
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}
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define i32 @tn3(i32 %v) nounwind readnone {
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entry:
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; CHECK-LABEL: tn3:
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; CHECK: sub r0, r0, r0, lsl #2
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%0 = mul i32 %v, -3
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ret i32 %0
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}
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define i32 @tn12288(i32 %v) nounwind readnone {
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entry:
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; CHECK-LABEL: tn12288:
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; CHECK: sub r0, r0, r0, lsl #2
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; CHECK: lsl{{.*}}#12
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%0 = mul i32 %v, -12288
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ret i32 %0
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}
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