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https://github.com/c64scene-ar/llvm-6502.git
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9de5d0dd42
- Cleaned up custom load/store logic, common code is now shared [see note below], cleaned up address modes - More test cases: various intrinsics, structure element access (load/store test), updated target data strings, indirect function calls. Note: This patch contains a refactoring of the LoadSDNode and StoreSDNode structures: they now share a common base class, LSBaseSDNode, that provides an interface to their common functionality. There is some hackery to access the proper operand depending on the derived class; otherwise, to do a proper job would require finding and rearranging the SDOperands sent to StoreSDNode's constructor. The current refactor errs on the side of being conservatively and backwardly compatible while providing functionality that reduces redundant code for targets where loads and stores are custom-lowered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45851 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
848 B
LLVM
41 lines
848 B
LLVM
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
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; RUN: grep "ilh" %t1.s | count 5
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
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target triple = "spu"
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define i16 @test_1() {
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%x = alloca i16, align 16
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store i16 419, i16* %x ;; ILH via pattern
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ret i16 0
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}
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define i16 @test_2() {
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%x = alloca i16, align 16
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store i16 1023, i16* %x ;; ILH via pattern
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ret i16 0
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}
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define i16 @test_3() {
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%x = alloca i16, align 16
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store i16 -1023, i16* %x ;; ILH via pattern
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ret i16 0
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}
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define i16 @test_4() {
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%x = alloca i16, align 16
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store i16 32767, i16* %x ;; ILH via pattern
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ret i16 0
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}
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define i16 @test_5() {
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%x = alloca i16, align 16
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store i16 -32768, i16* %x ;; ILH via pattern
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ret i16 0
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}
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define i16 @test_6() {
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ret i16 0
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}
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