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isReg, etc., from isRegister, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
530 lines
16 KiB
C++
530 lines
16 KiB
C++
//===------ RegAllocPBQP.cpp ---- PBQP Register Allocator -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a Partitioned Boolean Quadratic Programming (PBQP) based
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// register allocator for LLVM. This allocator works by constructing a PBQP
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// problem representing the register allocation problem under consideration,
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// solving this using a PBQP solver, and mapping the solution back to a
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// register assignment. If any variables are selected for spilling then spill
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// code is inserted and the process repeated.
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//
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// The PBQP solver (pbqp.c) provided for this allocator uses a heuristic tuned
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// for register allocation. For more information on PBQP for register
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// allocation see the following papers:
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//
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// (1) Hames, L. and Scholz, B. 2006. Nearly optimal register allocation with
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// PBQP. In Proceedings of the 7th Joint Modular Languages Conference
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// (JMLC'06). LNCS, vol. 4228. Springer, New York, NY, USA. 346-361.
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//
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// (2) Scholz, B., Eckstein, E. 2002. Register allocation for irregular
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// architectures. In Proceedings of the Joint Conference on Languages,
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// Compilers and Tools for Embedded Systems (LCTES'02), ACM Press, New York,
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// NY, USA, 139-148.
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//
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// Author: Lang Hames
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// Email: lhames@gmail.com
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//
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//===----------------------------------------------------------------------===//
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// TODO:
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//
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// * Use of std::set in constructPBQPProblem destroys allocation order preference.
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// Switch to an order preserving container.
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//
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// * Coalescing support.
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#define DEBUG_TYPE "regalloc"
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#include "PBQP.h"
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#include "VirtRegMap.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/RegAllocRegistry.h"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Support/Debug.h"
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#include <memory>
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#include <map>
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#include <set>
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#include <vector>
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#include <limits>
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using namespace llvm;
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static RegisterRegAlloc
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registerPBQPRepAlloc("pbqp", " PBQP register allocator",
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createPBQPRegisterAllocator);
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namespace {
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//!
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//! PBQP based allocators solve the register allocation problem by mapping
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//! register allocation problems to Partitioned Boolean Quadratic
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//! Programming problems.
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class VISIBILITY_HIDDEN PBQPRegAlloc : public MachineFunctionPass {
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public:
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static char ID;
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//! Construct a PBQP register allocator.
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PBQPRegAlloc() : MachineFunctionPass((intptr_t)&ID) {}
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//! Return the pass name.
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virtual const char* getPassName() const throw() {
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return "PBQP Register Allocator";
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}
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//! PBQP analysis usage.
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virtual void getAnalysisUsage(AnalysisUsage &au) const {
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au.addRequired<LiveIntervals>();
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au.addRequired<MachineLoopInfo>();
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MachineFunctionPass::getAnalysisUsage(au);
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}
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//! Perform register allocation
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virtual bool runOnMachineFunction(MachineFunction &MF);
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private:
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typedef std::map<const LiveInterval*, unsigned> LI2NodeMap;
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typedef std::vector<const LiveInterval*> Node2LIMap;
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typedef std::vector<unsigned> AllowedSet;
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typedef std::vector<AllowedSet> AllowedSetMap;
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typedef std::set<unsigned> IgnoreSet;
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MachineFunction *mf;
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const TargetMachine *tm;
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const TargetRegisterInfo *tri;
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const TargetInstrInfo *tii;
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const MachineLoopInfo *loopInfo;
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MachineRegisterInfo *mri;
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LiveIntervals *li;
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VirtRegMap *vrm;
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LI2NodeMap li2Node;
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Node2LIMap node2LI;
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AllowedSetMap allowedSets;
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IgnoreSet ignoreSet;
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//! Builds a PBQP cost vector.
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template <typename Container>
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PBQPVector* buildCostVector(const Container &allowed,
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PBQPNum spillCost) const;
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//! \brief Builds a PBQP interfernce matrix.
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//!
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//! @return Either a pointer to a non-zero PBQP matrix representing the
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//! allocation option costs, or a null pointer for a zero matrix.
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//!
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//! Expects allowed sets for two interfering LiveIntervals. These allowed
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//! sets should contain only allocable registers from the LiveInterval's
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//! register class, with any interfering pre-colored registers removed.
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template <typename Container>
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PBQPMatrix* buildInterferenceMatrix(const Container &allowed1,
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const Container &allowed2) const;
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//!
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//! Expects allowed sets for two potentially coalescable LiveIntervals,
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//! and an estimated benefit due to coalescing. The allowed sets should
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//! contain only allocable registers from the LiveInterval's register
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//! classes, with any interfering pre-colored registers removed.
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template <typename Container>
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PBQPMatrix* buildCoalescingMatrix(const Container &allowed1,
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const Container &allowed2,
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PBQPNum cBenefit) const;
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//! \brief Helper functior for constructInitialPBQPProblem().
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//!
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//! This function iterates over the Function we are about to allocate for
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//! and computes spill costs.
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void calcSpillCosts();
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//! \brief Scans the MachineFunction being allocated to find coalescing
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// opportunities.
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void findCoalescingOpportunities();
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//! \brief Constructs a PBQP problem representation of the register
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//! allocation problem for this function.
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//!
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//! @return a PBQP solver object for the register allocation problem.
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pbqp* constructPBQPProblem();
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//! \brief Given a solved PBQP problem maps this solution back to a register
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//! assignment.
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bool mapPBQPToRegAlloc(pbqp *problem);
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};
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char PBQPRegAlloc::ID = 0;
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}
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template <typename Container>
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PBQPVector* PBQPRegAlloc::buildCostVector(const Container &allowed,
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PBQPNum spillCost) const {
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// Allocate vector. Additional element (0th) used for spill option
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PBQPVector *v = new PBQPVector(allowed.size() + 1);
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(*v)[0] = spillCost;
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return v;
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}
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template <typename Container>
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PBQPMatrix* PBQPRegAlloc::buildInterferenceMatrix(
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const Container &allowed1, const Container &allowed2) const {
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typedef typename Container::const_iterator ContainerIterator;
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// Construct a PBQP matrix representing the cost of allocation options. The
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// rows and columns correspond to the allocation options for the two live
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// intervals. Elements will be infinite where corresponding registers alias,
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// since we cannot allocate aliasing registers to interfering live intervals.
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// All other elements (non-aliasing combinations) will have zero cost. Note
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// that the spill option (element 0,0) has zero cost, since we can allocate
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// both intervals to memory safely (the cost for each individual allocation
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// to memory is accounted for by the cost vectors for each live interval).
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PBQPMatrix *m = new PBQPMatrix(allowed1.size() + 1, allowed2.size() + 1);
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// Assume this is a zero matrix until proven otherwise. Zero matrices occur
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// between interfering live ranges with non-overlapping register sets (e.g.
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// non-overlapping reg classes, or disjoint sets of allowed regs within the
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// same class). The term "overlapping" is used advisedly: sets which do not
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// intersect, but contain registers which alias, will have non-zero matrices.
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// We optimize zero matrices away to improve solver speed.
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bool isZeroMatrix = true;
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// Row index. Starts at 1, since the 0th row is for the spill option, which
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// is always zero.
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unsigned ri = 1;
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// Iterate over allowed sets, insert infinities where required.
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for (ContainerIterator a1Itr = allowed1.begin(), a1End = allowed1.end();
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a1Itr != a1End; ++a1Itr) {
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// Column index, starts at 1 as for row index.
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unsigned ci = 1;
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unsigned reg1 = *a1Itr;
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for (ContainerIterator a2Itr = allowed2.begin(), a2End = allowed2.end();
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a2Itr != a2End; ++a2Itr) {
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unsigned reg2 = *a2Itr;
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// If the row/column regs are identical or alias insert an infinity.
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if ((reg1 == reg2) || tri->areAliases(reg1, reg2)) {
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(*m)[ri][ci] = std::numeric_limits<PBQPNum>::infinity();
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isZeroMatrix = false;
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}
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++ci;
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}
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++ri;
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}
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// If this turns out to be a zero matrix...
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if (isZeroMatrix) {
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// free it and return null.
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delete m;
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return 0;
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}
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// ...otherwise return the cost matrix.
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return m;
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}
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void PBQPRegAlloc::calcSpillCosts() {
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// Calculate the spill cost for each live interval by iterating over the
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// function counting loads and stores, with loop depth taken into account.
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for (MachineFunction::const_iterator bbItr = mf->begin(), bbEnd = mf->end();
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bbItr != bbEnd; ++bbItr) {
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const MachineBasicBlock *mbb = &*bbItr;
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float loopDepth = loopInfo->getLoopDepth(mbb);
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for (MachineBasicBlock::const_iterator
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iItr = mbb->begin(), iEnd = mbb->end(); iItr != iEnd; ++iItr) {
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const MachineInstr *instr = &*iItr;
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for (unsigned opNo = 0; opNo < instr->getNumOperands(); ++opNo) {
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const MachineOperand &mo = instr->getOperand(opNo);
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// We're not interested in non-registers...
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if (!mo.isReg())
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continue;
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unsigned moReg = mo.getReg();
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// ...Or invalid registers...
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if (moReg == 0)
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continue;
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// ...Or physical registers...
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if (TargetRegisterInfo::isPhysicalRegister(moReg))
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continue;
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assert ((mo.isUse() || mo.isDef()) &&
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"Not a use, not a def, what is it?");
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//... Just the virtual registers. We treat loads and stores as equal.
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li->getInterval(moReg).weight += powf(10.0f, loopDepth);
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}
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}
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}
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}
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pbqp* PBQPRegAlloc::constructPBQPProblem() {
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typedef std::vector<const LiveInterval*> LIVector;
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typedef std::set<unsigned> RegSet;
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// These will store the physical & virtual intervals, respectively.
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LIVector physIntervals, virtIntervals;
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// Start by clearing the old node <-> live interval mappings & allowed sets
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li2Node.clear();
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node2LI.clear();
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allowedSets.clear();
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// Iterate over intervals classifying them as physical or virtual, and
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// constructing live interval <-> node number mappings.
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for (LiveIntervals::iterator itr = li->begin(), end = li->end();
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itr != end; ++itr) {
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if (itr->second->getNumValNums() != 0) {
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DOUT << "Live range has " << itr->second->getNumValNums() << ": " << itr->second << "\n";
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}
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if (TargetRegisterInfo::isPhysicalRegister(itr->first)) {
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physIntervals.push_back(itr->second);
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mri->setPhysRegUsed(itr->second->reg);
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}
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else {
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// If we've allocated this virtual register interval a stack slot on a
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// previous round then it's not an allocation candidate
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if (ignoreSet.find(itr->first) != ignoreSet.end())
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continue;
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li2Node[itr->second] = node2LI.size();
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node2LI.push_back(itr->second);
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virtIntervals.push_back(itr->second);
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}
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}
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// Early out if there's no regs to allocate for.
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if (virtIntervals.empty())
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return 0;
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// Construct a PBQP solver for this problem
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pbqp *solver = alloc_pbqp(virtIntervals.size());
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// Resize allowedSets container appropriately.
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allowedSets.resize(virtIntervals.size());
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// Iterate over virtual register intervals to compute allowed sets...
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for (unsigned node = 0; node < node2LI.size(); ++node) {
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// Grab pointers to the interval and its register class.
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const LiveInterval *li = node2LI[node];
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const TargetRegisterClass *liRC = mri->getRegClass(li->reg);
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// Start by assuming all allocable registers in the class are allowed...
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RegSet liAllowed(liRC->allocation_order_begin(*mf),
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liRC->allocation_order_end(*mf));
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// If this range is non-empty then eliminate the physical registers which
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// overlap with this range, along with all their aliases.
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if (!li->empty()) {
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for (LIVector::iterator pItr = physIntervals.begin(),
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pEnd = physIntervals.end(); pItr != pEnd; ++pItr) {
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if (li->overlaps(**pItr)) {
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unsigned pReg = (*pItr)->reg;
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// Remove the overlapping reg...
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liAllowed.erase(pReg);
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const unsigned *aliasItr = tri->getAliasSet(pReg);
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if (aliasItr != 0) {
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// ...and its aliases.
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for (; *aliasItr != 0; ++aliasItr) {
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liAllowed.erase(*aliasItr);
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}
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}
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}
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}
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}
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// Copy the allowed set into a member vector for use when constructing cost
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// vectors & matrices, and mapping PBQP solutions back to assignments.
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allowedSets[node] = AllowedSet(liAllowed.begin(), liAllowed.end());
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// Set the spill cost to the interval weight, or epsilon if the
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// interval weight is zero
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PBQPNum spillCost = (li->weight != 0.0) ?
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li->weight : std::numeric_limits<PBQPNum>::min();
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// Build a cost vector for this interval.
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add_pbqp_nodecosts(solver, node,
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buildCostVector(allowedSets[node], spillCost));
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}
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// Now add the cost matrices...
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for (unsigned node1 = 0; node1 < node2LI.size(); ++node1) {
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const LiveInterval *li = node2LI[node1];
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if (li->empty())
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continue;
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// Test for live range overlaps and insert interference matrices.
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for (unsigned node2 = node1 + 1; node2 < node2LI.size(); ++node2) {
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const LiveInterval *li2 = node2LI[node2];
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if (li2->empty())
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continue;
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if (li->overlaps(*li2)) {
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PBQPMatrix *m =
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buildInterferenceMatrix(allowedSets[node1], allowedSets[node2]);
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if (m != 0) {
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add_pbqp_edgecosts(solver, node1, node2, m);
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delete m;
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}
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}
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}
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}
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// We're done, PBQP problem constructed - return it.
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return solver;
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}
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bool PBQPRegAlloc::mapPBQPToRegAlloc(pbqp *problem) {
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// Set to true if we have any spills
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bool anotherRoundNeeded = false;
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// Clear the existing allocation.
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vrm->clearAllVirt();
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// Iterate over the nodes mapping the PBQP solution to a register assignment.
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for (unsigned node = 0; node < node2LI.size(); ++node) {
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unsigned symReg = node2LI[node]->reg,
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allocSelection = get_pbqp_solution(problem, node);
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// If the PBQP solution is non-zero it's a physical register...
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if (allocSelection != 0) {
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// Get the physical reg, subtracting 1 to account for the spill option.
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unsigned physReg = allowedSets[node][allocSelection - 1];
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// Add to the virt reg map and update the used phys regs.
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vrm->assignVirt2Phys(symReg, physReg);
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mri->setPhysRegUsed(physReg);
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}
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// ...Otherwise it's a spill.
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else {
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// Make sure we ignore this virtual reg on the next round
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// of allocation
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ignoreSet.insert(node2LI[node]->reg);
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float SSWeight;
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// Insert spill ranges for this live range
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SmallVector<LiveInterval*, 8> spillIs;
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std::vector<LiveInterval*> newSpills =
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li->addIntervalsForSpills(*node2LI[node], spillIs, loopInfo, *vrm,
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SSWeight);
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// We need another round if spill intervals were added.
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anotherRoundNeeded |= !newSpills.empty();
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}
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}
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return !anotherRoundNeeded;
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}
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bool PBQPRegAlloc::runOnMachineFunction(MachineFunction &MF) {
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mf = &MF;
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tm = &mf->getTarget();
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tri = tm->getRegisterInfo();
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mri = &mf->getRegInfo();
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li = &getAnalysis<LiveIntervals>();
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loopInfo = &getAnalysis<MachineLoopInfo>();
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std::auto_ptr<VirtRegMap> vrmAutoPtr(new VirtRegMap(*mf));
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vrm = vrmAutoPtr.get();
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// Allocator main loop:
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//
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// * Map current regalloc problem to a PBQP problem
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// * Solve the PBQP problem
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// * Map the solution back to a register allocation
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// * Spill if necessary
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//
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// This process is continued till no more spills are generated.
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bool regallocComplete = false;
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// Calculate spill costs for intervals
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calcSpillCosts();
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while (!regallocComplete) {
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pbqp *problem = constructPBQPProblem();
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// Fast out if there's no problem to solve.
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if (problem == 0)
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return true;
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solve_pbqp(problem);
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regallocComplete = mapPBQPToRegAlloc(problem);
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free_pbqp(problem);
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}
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ignoreSet.clear();
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std::auto_ptr<Spiller> spiller(createSpiller());
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spiller->runOnMachineFunction(*mf, *vrm);
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return true;
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}
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FunctionPass* llvm::createPBQPRegisterAllocator() {
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return new PBQPRegAlloc();
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}
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#undef DEBUG_TYPE
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