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Based on CR feedback from r162301 and Craig Topper's refactoring in r162347 here are a few other places that could use the same API (& in one instance drop a Function.h dependency). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162367 91177308-0d34-0410-b5e6-96231b3b80d8
171 lines
5.5 KiB
C++
171 lines
5.5 KiB
C++
//===---------------------- ProcessImplicitDefs.cpp -----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "processimplicitdefs"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetInstrInfo.h"
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using namespace llvm;
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namespace {
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/// Process IMPLICIT_DEF instructions and make sure there is one implicit_def
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/// for each use. Add isUndef marker to implicit_def defs and their uses.
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class ProcessImplicitDefs : public MachineFunctionPass {
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const TargetInstrInfo *TII;
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const TargetRegisterInfo *TRI;
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MachineRegisterInfo *MRI;
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SmallSetVector<MachineInstr*, 16> WorkList;
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void processImplicitDef(MachineInstr *MI);
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bool canTurnIntoImplicitDef(MachineInstr *MI);
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public:
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static char ID;
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ProcessImplicitDefs() : MachineFunctionPass(ID) {
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initializeProcessImplicitDefsPass(*PassRegistry::getPassRegistry());
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}
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virtual void getAnalysisUsage(AnalysisUsage &au) const;
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virtual bool runOnMachineFunction(MachineFunction &fn);
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};
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} // end anonymous namespace
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char ProcessImplicitDefs::ID = 0;
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char &llvm::ProcessImplicitDefsID = ProcessImplicitDefs::ID;
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INITIALIZE_PASS_BEGIN(ProcessImplicitDefs, "processimpdefs",
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"Process Implicit Definitions", false, false)
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INITIALIZE_PASS_END(ProcessImplicitDefs, "processimpdefs",
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"Process Implicit Definitions", false, false)
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void ProcessImplicitDefs::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addPreserved<AliasAnalysis>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool ProcessImplicitDefs::canTurnIntoImplicitDef(MachineInstr *MI) {
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if (!MI->isCopyLike() &&
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!MI->isInsertSubreg() &&
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!MI->isRegSequence() &&
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!MI->isPHI())
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return false;
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for (MIOperands MO(MI); MO.isValid(); ++MO)
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if (MO->isReg() && MO->isUse() && MO->readsReg())
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return false;
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return true;
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}
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void ProcessImplicitDefs::processImplicitDef(MachineInstr *MI) {
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DEBUG(dbgs() << "Processing " << *MI);
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unsigned Reg = MI->getOperand(0).getReg();
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if (TargetRegisterInfo::isVirtualRegister(Reg)) {
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// For virtual regiusters, mark all uses as <undef>, and convert users to
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// implicit-def when possible.
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for (MachineRegisterInfo::use_nodbg_iterator UI =
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MRI->use_nodbg_begin(Reg),
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UE = MRI->use_nodbg_end(); UI != UE; ++UI) {
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MachineOperand &MO = UI.getOperand();
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MO.setIsUndef();
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MachineInstr *UserMI = MO.getParent();
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if (!canTurnIntoImplicitDef(UserMI))
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continue;
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DEBUG(dbgs() << "Converting to IMPLICIT_DEF: " << *UserMI);
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UserMI->setDesc(TII->get(TargetOpcode::IMPLICIT_DEF));
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WorkList.insert(UserMI);
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}
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MI->eraseFromParent();
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return;
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}
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// This is a physreg implicit-def.
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// Look for the first instruction to use or define an alias.
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MachineBasicBlock::instr_iterator UserMI = MI;
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MachineBasicBlock::instr_iterator UserE = MI->getParent()->instr_end();
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bool Found = false;
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for (++UserMI; UserMI != UserE; ++UserMI) {
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for (MIOperands MO(UserMI); MO.isValid(); ++MO) {
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if (!MO->isReg())
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continue;
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unsigned UserReg = MO->getReg();
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if (!TargetRegisterInfo::isPhysicalRegister(UserReg) ||
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!TRI->regsOverlap(Reg, UserReg))
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continue;
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// UserMI uses or redefines Reg. Set <undef> flags on all uses.
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Found = true;
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if (MO->isUse())
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MO->setIsUndef();
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}
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if (Found)
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break;
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}
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// If we found the using MI, we can erase the IMPLICIT_DEF.
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if (Found) {
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DEBUG(dbgs() << "Physreg user: " << *UserMI);
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MI->eraseFromParent();
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return;
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}
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// Using instr wasn't found, it could be in another block.
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// Leave the physreg IMPLICIT_DEF, but trim any extra operands.
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for (unsigned i = MI->getNumOperands() - 1; i; --i)
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MI->RemoveOperand(i);
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DEBUG(dbgs() << "Keeping physreg: " << *MI);
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}
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/// processImplicitDefs - Process IMPLICIT_DEF instructions and turn them into
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/// <undef> operands.
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bool ProcessImplicitDefs::runOnMachineFunction(MachineFunction &MF) {
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DEBUG(dbgs() << "********** PROCESS IMPLICIT DEFS **********\n"
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<< "********** Function: " << MF.getName() << '\n');
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bool Changed = false;
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TII = MF.getTarget().getInstrInfo();
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TRI = MF.getTarget().getRegisterInfo();
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MRI = &MF.getRegInfo();
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assert(MRI->isSSA() && "ProcessImplicitDefs only works on SSA form.");
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assert(WorkList.empty() && "Inconsistent worklist state");
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for (MachineFunction::iterator MFI = MF.begin(), MFE = MF.end();
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MFI != MFE; ++MFI) {
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// Scan the basic block for implicit defs.
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for (MachineBasicBlock::instr_iterator MBBI = MFI->instr_begin(),
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MBBE = MFI->instr_end(); MBBI != MBBE; ++MBBI)
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if (MBBI->isImplicitDef())
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WorkList.insert(MBBI);
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if (WorkList.empty())
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continue;
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DEBUG(dbgs() << "BB#" << MFI->getNumber() << " has " << WorkList.size()
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<< " implicit defs.\n");
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Changed = true;
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// Drain the WorkList to recursively process any new implicit defs.
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do processImplicitDef(WorkList.pop_back_val());
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while (!WorkList.empty());
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}
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return Changed;
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}
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