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https://github.com/c64scene-ar/llvm-6502.git
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30e62c098b
Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50477 91177308-0d34-0410-b5e6-96231b3b80d8
103 lines
3.8 KiB
C++
103 lines
3.8 KiB
C++
//===-- PPCMachineFunctionInfo.h - Private data used for PowerPC --*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the PowerPC specific subclass of MachineFunctionInfo.
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//
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//===----------------------------------------------------------------------===//
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#ifndef PPC_MACHINE_FUNCTION_INFO_H
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#define PPC_MACHINE_FUNCTION_INFO_H
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#include "llvm/CodeGen/MachineFunction.h"
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namespace llvm {
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/// PPCFunctionInfo - This class is derived from MachineFunction private
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/// PowerPC target-specific information for each MachineFunction.
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class PPCFunctionInfo : public MachineFunctionInfo {
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private:
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/// FramePointerSaveIndex - Frame index of where the old frame pointer is
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/// stored. Also used as an anchor for instructions that need to be altered
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/// when using frame pointers (dyna_add, dyna_sub.)
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int FramePointerSaveIndex;
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/// ReturnAddrSaveIndex - Frame index of where the return address is stored.
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///
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int ReturnAddrSaveIndex;
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/// UsesLR - Indicates whether LR is used in the current function. This is
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/// only valid after the initial scan of the function by PEI.
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bool UsesLR;
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/// SpillsCR - Indicates whether CR is spilled in the current function.
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bool SpillsCR;
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/// LRStoreRequired - The bool indicates whether there is some explicit use of
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/// the LR/LR8 stack slot that is not obvious from scanning the code. This
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/// requires that the code generator produce a store of LR to the stack on
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/// entry, even though LR may otherwise apparently not be used.
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bool LRStoreRequired;
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/// MinReservedArea - This is the frame size that is at least reserved in a
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/// potential caller (parameter+linkage area).
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unsigned MinReservedArea;
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/// TailCallSPDelta - Stack pointer delta used when tail calling. Maximum
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/// amount the stack pointer is adjusted to make the frame bigger for tail
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/// calls. Used for creating an area before the register spill area.
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int TailCallSPDelta;
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/// HasFastCall - Does this function contain a fast call. Used to determine
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/// how the caller's stack pointer should be calculated (epilog/dynamicalloc).
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bool HasFastCall;
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public:
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PPCFunctionInfo(MachineFunction &MF)
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: FramePointerSaveIndex(0),
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ReturnAddrSaveIndex(0),
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SpillsCR(false),
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LRStoreRequired(false),
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MinReservedArea(0),
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TailCallSPDelta(0),
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HasFastCall(false) {}
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int getFramePointerSaveIndex() const { return FramePointerSaveIndex; }
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void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = Idx; }
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int getReturnAddrSaveIndex() const { return ReturnAddrSaveIndex; }
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void setReturnAddrSaveIndex(int idx) { ReturnAddrSaveIndex = idx; }
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unsigned getMinReservedArea() const { return MinReservedArea; }
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void setMinReservedArea(unsigned size) { MinReservedArea = size; }
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int getTailCallSPDelta() const { return TailCallSPDelta; }
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void setTailCallSPDelta(int size) { TailCallSPDelta = size; }
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/// UsesLR - This is set when the prolog/epilog inserter does its initial scan
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/// of the function, it is true if the LR/LR8 register is ever explicitly
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/// accessed/clobbered in the machine function (e.g. by calls and movpctolr,
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/// which is used in PIC generation).
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void setUsesLR(bool U) { UsesLR = U; }
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bool usesLR() const { return UsesLR; }
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void setSpillsCR() { SpillsCR = true; }
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bool isCRSpilled() const { return SpillsCR; }
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void setLRStoreRequired() { LRStoreRequired = true; }
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bool isLRStoreRequired() const { return LRStoreRequired; }
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void setHasFastCall() { HasFastCall = true; }
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bool hasFastCall() const { return HasFastCall;}
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};
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} // end of namespace llvm
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#endif
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