llvm-6502/test/CodeGen
Eli Friedman c680ac9003 Make EXTRACT_VECTOR_ELT a bit more flexible in terms of the returned
value.  Adjust other code to deal with that correctly.  Make 
DAGTypeLegalizer::PromoteIntRes_EXTRACT_VECTOR_ELT take advantage of 
this new flexibility to simplify the code and make it deal with unusual 
vectors (like <4 x i1>) correctly.  Fixes PR3037.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75176 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 22:01:03 +00:00
..
Alpha
ARM Improved tracking of value number kills. VN kills are now represented 2009-07-09 03:57:02 +00:00
CBackend Fix an erroneous check for isFNeg; the FNeg case is handled 2009-06-04 23:43:29 +00:00
CellSPU Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
CPP Fix code emission for conditional branches. 2009-05-04 19:10:38 +00:00
Generic Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
IA64
Mips Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
MSP430 Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
PowerPC Fix codegen for references to available_externally symbols. This fixes 2009-07-01 16:53:44 +00:00
SPARC Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
Thumb Add missing tests. 2009-07-07 20:38:08 +00:00
Thumb2 Use common code for both ARM and Thumb-2 instruction and register info. 2009-07-08 23:10:31 +00:00
X86 Make EXTRACT_VECTOR_ELT a bit more flexible in terms of the returned 2009-07-09 22:01:03 +00:00
XCore Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00