llvm-6502/test/CodeGen/ARM/bicZext.ll
Joel Jones 96ef284da4 This change handles a another case for generating the bic instruction
when a compile time constant is known.  This occurs when implicitly zero 
extending function arguments from 16 bits to 32 bits.  The 8 bit case doesn't
need to be handled, as the 8 bit constants are encoded directly, thereby
not needing a separate load instruction to form the constant into a register.

<rdar://problem/11481151>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158659 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-18 14:51:32 +00:00

20 lines
438 B
LLVM

; RUN: llc %s -o - | FileCheck %s
; ModuleID = 'bic.c'
target triple = "thumbv7-apple-ios3.0.0"
define zeroext i16 @foo16(i16 zeroext %f) nounwind readnone optsize ssp {
entry:
; CHECK: .thumb_func _foo16
; CHECK: {{bic[^#]*#3}}
%and = and i16 %f, -4
ret i16 %and
}
define i32 @foo32(i32 %f) nounwind readnone optsize ssp {
entry:
; CHECK: .thumb_func _foo32
; CHECK: {{bic[^#]*#3}}
%and = and i32 %f, -4
ret i32 %and
}