llvm-6502/test/CodeGen/SPARC
Venkatraman Govindaraju 71e39dac0c Sparc backend: Implements a delay slot filler that attempt to fill delay slots
with useful instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123884 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 05:08:26 +00:00
..
2006-01-22-BitConvertLegalize.ll
2007-05-09-JumpTables.ll
2007-07-05-LiveIntervalAssert.ll
2008-10-10-InlineAsmMemoryOperand.ll
2008-10-10-InlineAsmRegOperand.ll
2009-08-28-PIC.ll
2009-08-28-WeakLinkage.ll
2010-04-07-DbgValueOtherTargets.ll If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 2010-12-06 22:39:26 +00:00
2011-01-11-Call.ll Fix SPARC backend call instruction so that arguments passed through registers 2011-01-12 03:18:21 +00:00
2011-01-11-CC.ll Implement AnalyzeBranch in Sparc Backend. 2011-01-16 03:15:11 +00:00
2011-01-11-FrameAddr.ll Implement RETURNADDR and FRAMEADDR lowering in SPARC backend. 2011-01-12 05:08:36 +00:00
2011-01-19-DelaySlot.ll Sparc backend: Implements a delay slot filler that attempt to fill delay slots 2011-01-20 05:08:26 +00:00
basictest.ll filecheckize 2010-11-23 02:26:52 +00:00
ctpop.ll add support for the sparcv9-*-* target triple to turn on 2010-02-04 06:34:01 +00:00
dg.exp
mult-alt-generic-sparc.ll Inline asm mult-alt constraint tests. 2010-11-02 23:01:44 +00:00
private.ll