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https://github.com/c64scene-ar/llvm-6502.git
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7c423b4df1
we were storing into [FP+88] instead of [FP+92]. Improve codegen by emitting [FP+92], instead of emitting a copy of FP into another GPR which wouldn't be coallesced because FP isn't register allocated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24859 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
Alpha | ||
CBackend | ||
IA64 | ||
PowerPC | ||
Skeleton | ||
Sparc | ||
SparcV8 | ||
SparcV9 | ||
X86 | ||
Makefile | ||
MRegisterInfo.cpp | ||
SubtargetFeature.cpp | ||
Target.td | ||
TargetData.cpp | ||
TargetFrameInfo.cpp | ||
TargetInstrInfo.cpp | ||
TargetMachine.cpp | ||
TargetMachineRegistry.cpp | ||
TargetSchedInfo.cpp | ||
TargetSchedule.td | ||
TargetSelectionDAG.td | ||
TargetSubtarget.cpp |