llvm-6502/test/CodeGen/ARM64/2012-05-09-LOADgot-bug.ll
Tim Northover 7b837d8c75 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00

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LLVM

; RUN: llc -mtriple=arm64-apple-ios < %s | FileCheck %s
; RUN: llc -mtriple=arm64-linux-gnu -relocation-model=pic < %s | FileCheck %s --check-prefix=CHECK-LINUX
; <rdar://problem/11392109>
define hidden void @t() optsize ssp {
entry:
store i64 zext (i32 ptrtoint (i64 (i32)* @x to i32) to i64), i64* undef, align 8
; CHECK: adrp x{{[0-9]+}}, _x@GOTPAGE
; CHECK: ldr x{{[0-9]+}}, [x{{[0-9]+}}, _x@GOTPAGEOFF]
; CHECK-NEXT: and x{{[0-9]+}}, x{{[0-9]+}}, #0xffffffff
; CHECK-NEXT: str x{{[0-9]+}}, [x{{[0-9]+}}]
unreachable
}
declare i64 @x(i32) optsize
; Worth checking the Linux code is sensible too: only way to access
; the GOT is via a 64-bit load. Just loading wN is unacceptable
; (there's no ELF relocation to do that).
; CHECK-LINUX: adrp {{x[0-9]+}}, :got:x
; CHECK-LINUX: ldr {{x[0-9]+}}, [{{x[0-9]+}}, :got_lo12:x]