llvm-6502/test/CodeGen/MIR/X86/named-registers.mir
Alex Lorenz 9982d6f7ee MIR Serialization: Serialize physical register machine operands.
This commit introduces functionality that's used to serialize machine operands.
Only the physical register operands are serialized by this commit.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10525


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240425 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 16:35:26 +00:00

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# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
# This test ensures that the MIR parser parses X86 registers correctly.
--- |
define i32 @foo() {
entry:
ret i32 0
}
...
---
# CHECK: name: foo
name: foo
body:
- name: entry
instructions:
# CHECK: - '%eax = MOV32r0
# CHECK-NEXT: - 'RETQ %eax
- '%eax = MOV32r0'
- 'RETQ %eax'
...