mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-20 10:30:03 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
91 lines
1.8 KiB
LLVM
91 lines
1.8 KiB
LLVM
; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s
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define i64 @f1() {
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; CHECK-LABEL: f1:
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entry:
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ret i64 0
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}
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define i64 @f2() {
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; CHECK-LABEL: f2:
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entry:
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ret i64 1
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}
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define i64 @f3() {
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; CHECK-LABEL: f3:
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; CHECK: mvn r0, #-2147483648
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entry:
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ret i64 2147483647
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}
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define i64 @f4() {
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; CHECK-LABEL: f4:
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; CHECK: mov r0, #-2147483648
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entry:
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ret i64 2147483648
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}
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define i64 @f5() {
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; CHECK-LABEL: f5:
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; CHECK: mvn r0, #0
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; CHECK: mvn r1, #-2147483648
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entry:
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ret i64 9223372036854775807
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}
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define i64 @f6(i64 %x, i64 %y) {
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; CHECK-LABEL: f6:
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; CHECK: adds
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; CHECK: adc
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entry:
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%tmp1 = add i64 %y, 1 ; <i64> [#uses=1]
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ret i64 %tmp1
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}
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define void @f7() {
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; CHECK-LABEL: f7:
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entry:
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%tmp = call i64 @f8( ) ; <i64> [#uses=0]
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ret void
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}
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declare i64 @f8()
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define i64 @f9(i64 %a, i64 %b) {
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; CHECK-LABEL: f9:
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; CHECK: subs r
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; CHECK: sbc
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entry:
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%tmp = sub i64 %a, %b ; <i64> [#uses=1]
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ret i64 %tmp
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}
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define i64 @f(i32 %a, i32 %b) {
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; CHECK-LABEL: f:
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; CHECK: smull
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entry:
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%tmp = sext i32 %a to i64 ; <i64> [#uses=1]
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%tmp1 = sext i32 %b to i64 ; <i64> [#uses=1]
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%tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
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ret i64 %tmp2
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}
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define i64 @g(i32 %a, i32 %b) {
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; CHECK-LABEL: g:
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; CHECK: umull
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entry:
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%tmp = zext i32 %a to i64 ; <i64> [#uses=1]
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%tmp1 = zext i32 %b to i64 ; <i64> [#uses=1]
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%tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
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ret i64 %tmp2
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}
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define i64 @f10() {
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; CHECK-LABEL: f10:
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entry:
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%a = alloca i64, align 8 ; <i64*> [#uses=1]
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%retval = load i64, i64* %a ; <i64> [#uses=1]
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ret i64 %retval
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}
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