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Generate code for the Blackfin family of DSPs from Analog Devices: http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html We aim to be compatible with the exsisting GNU toolchain found at: http://blackfin.uclinux.org/gf/project/toolchain The back-end is experimental. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8
52 lines
956 B
LLVM
52 lines
956 B
LLVM
; RUN: llvm-as < %s | llc -march=bfin -verify-machineinstrs
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define i32 @add(i32 %A, i32 %B) {
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%R = add i32 %A, %B ; <i32> [#uses=1]
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ret i32 %R
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}
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define i32 @sub(i32 %A, i32 %B) {
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%R = sub i32 %A, %B ; <i32> [#uses=1]
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ret i32 %R
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}
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define i32 @mul(i32 %A, i32 %B) {
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%R = mul i32 %A, %B ; <i32> [#uses=1]
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ret i32 %R
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}
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define i32 @sdiv(i32 %A, i32 %B) {
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%R = sdiv i32 %A, %B ; <i32> [#uses=1]
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ret i32 %R
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}
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define i32 @udiv(i32 %A, i32 %B) {
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%R = udiv i32 %A, %B ; <i32> [#uses=1]
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ret i32 %R
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}
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define i32 @srem(i32 %A, i32 %B) {
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%R = srem i32 %A, %B ; <i32> [#uses=1]
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ret i32 %R
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}
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define i32 @urem(i32 %A, i32 %B) {
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%R = urem i32 %A, %B ; <i32> [#uses=1]
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ret i32 %R
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}
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define i32 @and(i32 %A, i32 %B) {
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%R = and i32 %A, %B ; <i32> [#uses=1]
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ret i32 %R
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}
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define i32 @or(i32 %A, i32 %B) {
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%R = or i32 %A, %B ; <i32> [#uses=1]
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ret i32 %R
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}
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define i32 @xor(i32 %A, i32 %B) {
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%R = xor i32 %A, %B ; <i32> [#uses=1]
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ret i32 %R
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}
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