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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
38 lines
1.5 KiB
LLVM
38 lines
1.5 KiB
LLVM
; RUN: llc < %s -march=x86
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; rdar://6642541
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%struct.HandleBlock = type { [30 x i32], [990 x i8*], %struct.HandleBlockTrailer }
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%struct.HandleBlockTrailer = type { %struct.HandleBlock* }
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define hidden zeroext i8 @IsHandleAllocatedFromPool(i8** %h) nounwind optsize {
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entry:
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%0 = ptrtoint i8** %h to i32 ; <i32> [#uses=2]
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%1 = and i32 %0, -4096 ; <i32> [#uses=1]
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%2 = inttoptr i32 %1 to %struct.HandleBlock* ; <%struct.HandleBlock*> [#uses=3]
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%3 = getelementptr %struct.HandleBlock, %struct.HandleBlock* %2, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
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%4 = load i32, i32* %3, align 4096 ; <i32> [#uses=1]
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%5 = icmp eq i32 %4, 1751280747 ; <i1> [#uses=1]
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br i1 %5, label %bb, label %bb1
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bb: ; preds = %entry
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%6 = getelementptr %struct.HandleBlock, %struct.HandleBlock* %2, i32 0, i32 1 ; <[990 x i8*]*> [#uses=1]
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%7 = ptrtoint [990 x i8*]* %6 to i32 ; <i32> [#uses=1]
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%8 = sub i32 %0, %7 ; <i32> [#uses=2]
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%9 = lshr i32 %8, 2 ; <i32> [#uses=1]
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%10 = ashr i32 %8, 7 ; <i32> [#uses=1]
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%11 = and i32 %10, 134217727 ; <i32> [#uses=1]
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%12 = getelementptr %struct.HandleBlock, %struct.HandleBlock* %2, i32 0, i32 0, i32 %11 ; <i32*> [#uses=1]
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%not.i = and i32 %9, 31 ; <i32> [#uses=1]
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%13 = xor i32 %not.i, 31 ; <i32> [#uses=1]
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%14 = shl i32 1, %13 ; <i32> [#uses=1]
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%15 = load i32, i32* %12, align 4 ; <i32> [#uses=1]
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%16 = and i32 %15, %14 ; <i32> [#uses=1]
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%17 = icmp eq i32 %16, 0 ; <i1> [#uses=1]
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%tmp = zext i1 %17 to i8 ; <i8> [#uses=1]
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ret i8 %tmp
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bb1: ; preds = %entry
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ret i8 0
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}
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