llvm-6502/test/CodeGen
Eric Christopher 7d5a61e975 For 64-bit the rest of the general regs are ok for the q constraint. Make
sure we can emit both the high and low versions of those registers.

Fixes rdar://10392864

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145579 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 08:12:41 +00:00
..
ARM Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment. 2011-11-30 21:54:15 +00:00
CBackend
CellSPU
CPP
Generic
MBlaze
Mips Change names for MIPS "generic" processors defined in Mips.td to match what GNU 2011-11-29 23:08:41 +00:00
MSP430
PowerPC
PTX
SPARC
Thumb
Thumb2
X86 For 64-bit the rest of the general regs are ok for the q constraint. Make 2011-12-01 08:12:41 +00:00
XCore