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https://github.com/c64scene-ar/llvm-6502.git
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7516444a26
Emit an optimized instruction sequence for sdiv by power-of-2 depending on the exact flag. This fixes rdar://problem/18224511. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217986 91177308-0d34-0410-b5e6-96231b3b80d8
57 lines
1.6 KiB
LLVM
57 lines
1.6 KiB
LLVM
; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s
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define i32 @sdiv_i32_exact(i32 %a) {
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; CHECK-LABEL: sdiv_i32_exact
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; CHECK: asr {{w[0-9]+}}, w0, #3
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%1 = sdiv exact i32 %a, 8
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ret i32 %1
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}
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define i32 @sdiv_i32_pos(i32 %a) {
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; CHECK-LABEL: sdiv_i32_pos
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; CHECK: add [[REG1:w[0-9]+]], w0, #7
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: csel [[REG2:w[0-9]+]], [[REG1]], w0, lt
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; CHECK-NEXT: asr {{w[0-9]+}}, [[REG2]], #3
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%1 = sdiv i32 %a, 8
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ret i32 %1
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}
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define i32 @sdiv_i32_neg(i32 %a) {
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; CHECK-LABEL: sdiv_i32_neg
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; CHECK: add [[REG1:w[0-9]+]], w0, #7
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: csel [[REG2:w[0-9]+]], [[REG1]], w0, lt
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; CHECK-NEXT: neg {{w[0-9]+}}, [[REG2]], asr #3
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%1 = sdiv i32 %a, -8
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ret i32 %1
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}
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define i64 @sdiv_i64_exact(i64 %a) {
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; CHECK-LABEL: sdiv_i64_exact
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; CHECK: asr {{x[0-9]+}}, x0, #4
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%1 = sdiv exact i64 %a, 16
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ret i64 %1
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}
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define i64 @sdiv_i64_pos(i64 %a) {
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; CHECK-LABEL: sdiv_i64_pos
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; CHECK: add [[REG1:x[0-9]+]], x0, #15
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; CHECK-NEXT: cmp x0, #0
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; CHECK-NEXT: csel [[REG2:x[0-9]+]], [[REG1]], x0, lt
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; CHECK-NEXT: asr {{x[0-9]+}}, [[REG2]], #4
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%1 = sdiv i64 %a, 16
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ret i64 %1
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}
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define i64 @sdiv_i64_neg(i64 %a) {
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; CHECK-LABEL: sdiv_i64_neg
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; CHECK: add [[REG1:x[0-9]+]], x0, #15
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; CHECK-NEXT: cmp x0, #0
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; CHECK-NEXT: csel [[REG2:x[0-9]+]], [[REG1]], x0, lt
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; CHECK-NEXT: neg {{x[0-9]+}}, [[REG2]], asr #4
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%1 = sdiv i64 %a, -16
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ret i64 %1
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}
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