llvm-6502/lib/Target/Mips
Jakob Stoklund Olesen ca561ffcf3 Replace the SubRegSet tablegen class with a less error-prone mechanism.
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104704 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 17:27:12 +00:00
..
AsmPrinter Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what 2010-05-14 21:14:32 +00:00
TargetInfo
CMakeLists.txt
Makefile
Mips.h
Mips.td
MipsCallingConv.td
MipsDelaySlotFiller.cpp
MipsInstrFormats.td
MipsInstrFPU.td
MipsInstrInfo.cpp Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it 2010-05-06 20:33:48 +00:00
MipsInstrInfo.h Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it 2010-05-06 20:33:48 +00:00
MipsInstrInfo.td
MipsISelDAGToDAG.cpp SubRegIndex'ize Mips 2010-05-24 17:42:58 +00:00
MipsISelLowering.cpp Get rid of the EdgeMapping map. Instead, just check for BasicBlock 2010-05-01 00:01:06 +00:00
MipsISelLowering.h Get rid of the EdgeMapping map. Instead, just check for BasicBlock 2010-05-01 00:01:06 +00:00
MipsMachineFunction.h Move per-function state out of TargetLowering subclasses and into 2010-04-17 14:41:14 +00:00
MipsMCAsmInfo.cpp
MipsMCAsmInfo.h
MipsRegisterInfo.cpp Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what 2010-05-14 21:14:32 +00:00
MipsRegisterInfo.h SubRegIndex'ize Mips 2010-05-24 17:42:58 +00:00
MipsRegisterInfo.td Replace the SubRegSet tablegen class with a less error-prone mechanism. 2010-05-26 17:27:12 +00:00
MipsSchedule.td Make processor FUs unique for given itinerary. This extends the limit of 32 2010-04-18 20:31:01 +00:00
MipsSelectionDAGInfo.cpp Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MipsSelectionDAGInfo.h Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MipsSubtarget.cpp
MipsSubtarget.h
MipsTargetMachine.cpp Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MipsTargetMachine.h Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h