llvm-6502/test/CodeGen/X86/extractps.ll
Dan Gohman d9ced09299 Add an EXTRACTPSmr pattern to match the pattern that
X86ISelLowering creates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54544 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:30:21 +00:00

17 lines
666 B
LLVM

; RUN: llvm-as < %s | llc -mcpu=penryn | grep mov | count 1
; PR2647
external global float, align 16 ; <float*>:0 [#uses=2]
define internal void @""() nounwind {
load float* @0, align 16 ; <float>:1 [#uses=1]
insertelement <4 x float> undef, float %1, i32 0 ; <<4 x float>>:2 [#uses=1]
call <4 x float> @llvm.x86.sse.rsqrt.ss( <4 x float> %2 ) ; <<4 x float>>:3 [#uses=1]
extractelement <4 x float> %3, i32 0 ; <float>:4 [#uses=1]
store float %4, float* @0, align 16
ret void
}
declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone