Quentin Colombet d64ee4455a ARM: Correct printing of pre-indexed operands. ... According to the ARM reference manual, constant offsets are mandatory for pre-indexed addressing modes. The MC disassembler was not obeying this when the offset is 0. It was producing instructions like: str r0, [r1]!. Correct syntax is: str r0, [r1, #0]!. This change modifies the dumping of operands so that the offset is always printed, regardless of its value, when pre-indexed addressing mode is used. Patch by Mihail Popa <Mihail.Popa@arm.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179398 91177308-0d34-0410-b5e6-96231b3b80d8		2013-04-12 18:47:25 +00:00
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AArch64	AArch64: implement ETMv4 trace system registers.	2013-04-03 12:31:29 +00:00
ARM	ARM: Correct printing of pre-indexed operands.	2013-04-12 18:47:25 +00:00
MBlaze
Mips	This is a resubmittal. For some reason it broke the bots yesterday	2013-01-17 00:28:20 +00:00
X86	Add CLAC/STAC instruction encoding/decoding support	2013-04-11 04:52:28 +00:00
XCore	[XCore] Add bru instruction.	2013-04-04 20:05:35 +00:00