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The numbering plan is now: 0 NoRegister. [1;2^30) Physical registers. [2^30;2^31) Stack slots. [2^31;2^32) Virtual registers. (With -1u and -2u used by DenseMapInfo.) Each segment is filled from the left, so any mistaken interpretation should quickly cause crashes. FirstVirtualRegister has been removed. TargetRegisterInfo provides predicates conversion functions that should be used instead of interpreting register numbers manually. It is now legal to pass NoRegister to isPhysicalRegister() and isVirtualRegister(). The result is false in both cases. It is quite rare to represent stack slots in this way, so isPhysicalRegister() and isVirtualRegister() require that isStackSlot() be checked first if it can possibly return true. This allows a very fast implementation of the common predicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123137 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
Mangler.h | ||
SubtargetFeature.h | ||
Target.td | ||
TargetAsmBackend.h | ||
TargetAsmInfo.h | ||
TargetAsmLexer.h | ||
TargetAsmParser.h | ||
TargetCallingConv.h | ||
TargetCallingConv.td | ||
TargetData.h | ||
TargetELFWriterInfo.h | ||
TargetFrameInfo.h | ||
TargetInstrDesc.h | ||
TargetInstrInfo.h | ||
TargetInstrItineraries.h | ||
TargetIntrinsicInfo.h | ||
TargetJITInfo.h | ||
TargetLowering.h | ||
TargetLoweringObjectFile.h | ||
TargetMachine.h | ||
TargetOpcodes.h | ||
TargetOptions.h | ||
TargetRegisterInfo.h | ||
TargetRegistry.h | ||
TargetSchedule.td | ||
TargetSelect.h | ||
TargetSelectionDAG.td | ||
TargetSelectionDAGInfo.h | ||
TargetSubtarget.h |