Hal Finkel da3446099d Fix pointer info on PPC byval stores ... For PPC64 SVR (and Darwin), the stores that take byval aggregate parameters from registers into the stack frame had MachinePointerInfo objects with incorrect offsets. These offsets are relative to the object itself, not to the stack frame base. This fixes self hosting on PPC64 when compiling with -enable-aa-sched-mi. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199763 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-21 20:15:58 +00:00
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AArch64	[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.	2014-01-21 01:48:52 +00:00
ARM	Remove the useless pseudo instructions VDUPfdf and VDUPfqf, replacing them with patterns to match VDUPLN.	2014-01-20 17:14:48 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[mips][msa] Correct pattern for LSA	2014-01-17 15:40:05 +00:00
MSP430
NVPTX	[NVPTX] Add missing patterns for div.approx with immediate denominator	2014-01-21 14:40:05 +00:00
PowerPC	Fix pointer info on PPC byval stores	2014-01-21 20:15:58 +00:00
R600
SPARC	Always let value types influence register classes.	2014-01-14 06:18:38 +00:00
SystemZ
Thumb
Thumb2	Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocks	2014-01-13 18:47:54 +00:00
X86	[X86] Teach how to combine a vselect into a movss/movsd	2014-01-20 19:35:22 +00:00
XCore