Evan Cheng da43bcf624 Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56526 91177308-0d34-0410-b5e6-96231b3b80d8		2008-09-24 00:05:32 +00:00
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ARM	Unallocatable registers do not have live intervals.	2008-09-17 18:36:25 +00:00
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X86	Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.	2008-09-24 00:05:32 +00:00