llvm-6502/test
Pirama Arumuga Nainar dab5145cb3 [AArch64] Add nvcast patterns for v4f16 and v8f16
Summary:
Constant stores of f16 vectors can create NvCast nodes from various
operand types to v4f16 or v8f16 depending on patterns in the stored
constants.  This patch adds nvcast rules with v4f16 and v8f16 values.

AArchISelLowering::LowerBUILD_VECTOR has the details on which constant
patterns generate the nvcast nodes.

Reviewers: jmolloy, srhines, ab

Subscribers: rengolin, aemerson, llvm-commits

Differential Revision: http://reviews.llvm.org/D9201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235610 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-23 17:32:25 +00:00
..
Analysis Fix a type mismatch assert in SCEV division 2015-04-22 15:06:40 +00:00
Assembler
Bindings
Bitcode Be more strict about the operand for the array type in BitcodeReader 2015-04-23 13:38:21 +00:00
BugPoint
CodeGen [AArch64] Add nvcast patterns for v4f16 and v8f16 2015-04-23 17:32:25 +00:00
DebugInfo Unxfail passing test on Hexagon 2015-04-22 21:41:24 +00:00
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
Linker Linker: Add flag to override linkage rules 2015-04-22 04:11:00 +00:00
LTO
MC Re-commit r235560: Switch lowering: extract jump tables and bit tests before building binary tree (PR22262) 2015-04-23 16:45:24 +00:00
Object Support arm32 R_ARM_V4BX relocation format 2015-04-22 15:26:43 +00:00
Other
SymbolRewriter
TableGen
tools
Transforms Add support to interchange loops with reductions. 2015-04-23 04:51:44 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh