Dan Gohman b116142d3b Revert r129875, XFAILing this test for arm, since the fix was reverted. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139058 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-03 00:14:24 +00:00
..
Alpha
ARM	Don't fast-isel for atomic load/store; some cases require extra handling missing from fast-isel.	2011-09-02 22:33:24 +00:00
Blackfin	more tests not making the jump into the brave new world.	2011-07-09 16:57:10 +00:00
CBackend	Revert r137134. It breaks some code as Eli pointed out.	2011-08-09 18:56:35 +00:00
CellSPU	Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.	2011-09-02 10:05:01 +00:00
CPP
Generic	Revert r129875, XFAILing this test for arm, since the fix was reverted.	2011-09-03 00:14:24 +00:00
MBlaze
Mips	Better fix for this testcase. Update it to the new EH scheme entirely.	2011-09-02 21:27:08 +00:00
MSP430
PowerPC	Update more tests to the new EH scheme.	2011-08-31 21:04:11 +00:00
PTX	PTX: Add initial support for device function calls	2011-08-09 17:36:31 +00:00
SPARC
SystemZ
Thumb	Revert r131152, r129796, r129761. This code is currently considered	2011-09-01 23:07:08 +00:00
Thumb2	Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical	2011-08-30 01:34:54 +00:00
X86	Pseudo CMOV instructions don't clobber EFLAGS.	2011-09-02 23:52:55 +00:00
XCore	Add Uses=[SP] to call instructions. This fixes a miscompilation with a	2011-08-24 13:32:43 +00:00