Jakob Stoklund Olesen 459b74b964 Encode register class constreaints in inline asm instructions. ... The inline asm operand constraint is initially encoded in the virtual register for the operand, but that register class may change during coalescing, and the original constraint is lost. Encode the original register class as part of the flag word for each inline asm operand. This makes it possible to recover the actual constraint required by inline asm, just like we can for normal instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141833 91177308-0d34-0410-b5e6-96231b3b80d8		2011-10-12 23:37:29 +00:00
..
CMakeLists.txt
DAGCombiner.cpp
FastISel.cpp	Fix a thinko that Nick noticed. The previous code actually worked as	2011-10-12 15:56:56 +00:00
FunctionLoweringInfo.cpp
InstrEmitter.cpp
InstrEmitter.h
LegalizeDAG.cpp	Add support for legalization of vector SHL/SRA/SRL instructions	2011-10-11 14:36:35 +00:00
LegalizeFloatTypes.cpp
LegalizeIntegerTypes.cpp
LegalizeTypes.cpp
LegalizeTypes.h
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp
LegalizeVectorTypes.cpp
Makefile
ScheduleDAGFast.cpp
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp
ScheduleDAGSDNodes.cpp
ScheduleDAGSDNodes.h
SDNodeDbgValue.h
SDNodeOrdering.h
SelectionDAG.cpp	Formatting.	2011-10-11 22:59:04 +00:00
SelectionDAGBuilder.cpp	Encode register class constreaints in inline asm instructions.	2011-10-12 23:37:29 +00:00
SelectionDAGBuilder.h	Remove the old atomic instrinsics. autoupgrade functionality is included with this patch.	2011-10-06 23:20:49 +00:00
SelectionDAGISel.cpp	Modify the mapping from landing pad to call sites to accept more than one call	2011-10-05 22:24:35 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp	Use an existing function.	2011-10-12 01:24:51 +00:00
TargetSelectionDAGInfo.cpp