David Blaikie c108a06c86 DebugInfo: Assume all subprogram DIEs have been created before any abstract subprograms are constructed. ... Since we visit the whole list of subprograms for each CU at module start, this is clearly true - don't test for the case, just assert it. A few old test cases seemed to have incomplete subprogram lists, but any attempt to reproduce them shows full subprogram lists that even include entities that have been completely inlined and the out of line definition removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209178 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-19 23:16:19 +00:00
..
AArch64	Revert "Implement global merge optimization for global variables."	2014-05-16 13:02:18 +00:00
ARM	SDAG: Legalize vector BSWAP into a shuffle if the shuffle is legal but the bswap not.	2014-05-19 13:12:38 +00:00
ARM64	[ARM64] Adds Cortex-A53 scheduling support for vector load/store post.	2014-05-19 22:59:51 +00:00
CPP
Generic
Hexagon	reverting r209132	2014-05-19 16:22:11 +00:00
Inputs
Mips	Finish materialize for ints	2014-05-15 21:54:15 +00:00
MSP430
NVPTX
PowerPC	DebugInfo: Sure up subprogram variable list handling with more assertions and fewer conditionals.	2014-05-14 21:52:46 +00:00
R600	R600/SI: Promote f32 SELECT to i32	2014-05-16 20:56:41 +00:00
SPARC	TableGen: fix operand counting for aliases	2014-05-16 09:42:04 +00:00
SystemZ
Thumb	Re-enable inline memcpy expansion for Thumb1.	2014-05-16 14:24:22 +00:00
Thumb2	Fix the Load/Store optimization pass to work with Thumb1.	2014-05-16 14:14:30 +00:00
X86	DebugInfo: Assume all subprogram DIEs have been created before any abstract subprograms are constructed.	2014-05-19 23:16:19 +00:00
XCore