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llvm-6502/lib/Target/IA64
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Duncan Sands 00fee65fd2 In TargetLowering::LowerCallTo, don't assert that 
the return value is zero-extended if it isn't
sign-extended.  It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned".  Currently
isSExt is set when signed, and nothing is
set otherwise.  This should be right for all
calls to standard library routines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47122 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14 17:28:50 +00:00
..
IA64.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64AsmPrinter.cpp Rename MRegisterInfo to TargetRegisterInfo. 2008-02-10 18:45:23 +00:00
IA64Bundling.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64InstrBuilder.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64InstrFormats.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64InstrInfo.cpp remove MachineOpCode typedef. 2008-01-07 02:48:55 +00:00
IA64InstrInfo.h Rename MRegisterInfo to TargetRegisterInfo. 2008-02-10 18:45:23 +00:00
IA64InstrInfo.td Change how FP immediates are handled. 2008-02-14 08:57:00 +00:00
IA64ISelDAGToDAG.cpp Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. 2008-02-04 23:06:48 +00:00
IA64ISelLowering.cpp In TargetLowering::LowerCallTo, don't assert that 2008-02-14 17:28:50 +00:00
IA64ISelLowering.h In TargetLowering::LowerCallTo, don't assert that 2008-02-14 17:28:50 +00:00
IA64MachineFunctionInfo.h Remove trailing whitespace 2005-04-21 23:13:11 +00:00
IA64RegisterInfo.cpp Rename MRegisterInfo to TargetRegisterInfo. 2008-02-10 18:45:23 +00:00
IA64RegisterInfo.h Rename MRegisterInfo to TargetRegisterInfo. 2008-02-10 18:45:23 +00:00
IA64RegisterInfo.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64TargetAsmInfo.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64TargetAsmInfo.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64TargetMachine.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64TargetMachine.h Rename MRegisterInfo to TargetRegisterInfo. 2008-02-10 18:45:23 +00:00
Makefile remove attribution from lib Makefiles. 2007-12-29 20:09:26 +00:00
README Stuff noticed while grepping code 2008-02-11 23:47:56 +00:00

README 

TODO:
  - Un-bitrot ISel
  - Hook up If-Conversion a la ARM target
  - Hook up all branch analysis functions
  - Instruction scheduling
  - Bundling
  - Dynamic Optimization
  - Testing and bugfixing
  - stop passing FP args in both FP *and* integer regs when not required
  - allocate low (nonstacked) registers more aggressively
  - clean up and thoroughly test the isel patterns.
  - fix stacked register allocation order: (for readability) we don't want
    the out? registers being the first ones used
  - fix up floating point
    (nb http://gcc.gnu.org/wiki?pagename=ia64%20floating%20point )
  - bundling!
    (we will avoid the mess that is:
     http://gcc.gnu.org/ml/gcc/2003-12/msg00832.html )
  - instruction scheduling (hmmmm! ;)
  - counted loop support
  - make integer + FP mul/div more clever (we have fixed pseudocode atm)
  - track and use comparison complements

INFO:
  - we are strictly LP64 here, no support for ILP32 on HP-UX. Linux users
    don't need to worry about this.
  - i have instruction scheduling/bundling pseudocode, that really works
    (has been tested, albeit at the perl-script level).
    so, before you go write your own, send me an email!

KNOWN DEFECTS AT THE CURRENT TIME:
  - C++ vtables contain naked function pointers, not function descriptors,
  which is bad. see http://llvm.cs.uiuc.edu/bugs/show_bug.cgi?id=406
  - varargs are broken
  - alloca doesn't work (indeed, stack frame layout is bogus)
  - no support for big-endian environments
  - (not really the backend, but...) the CFE has some issues on IA64.
    these will probably be fixed soon.
  
ACKNOWLEDGEMENTS:
  - Chris Lattner (x100)
  - Other LLVM developers ("hey, that looks familiar")

CONTACT:
  - You can email me at duraid@octopus.com.au. If you find a small bug,
    just email me. If you find a big bug, please file a bug report
    in bugzilla! http://llvm.cs.uiuc.edu is your one stop shop for all
    things LLVM.