mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-25 14:30:32 +00:00
49683f3c96
The new target machines are: nvptx (old ptx32) => 32-bit PTX nvptx64 (old ptx64) => 64-bit PTX The sources are based on the internal NVIDIA NVPTX back-end, and contain more functionality than the current PTX back-end currently provides. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156196 91177308-0d34-0410-b5e6-96231b3b80d8
45 lines
1.6 KiB
TableGen
45 lines
1.6 KiB
TableGen
//===- NVPTX.td - Describe the NVPTX Target Machine -----------*- tblgen -*-==//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
// This is the top level entry point for the NVPTX target.
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Target-independent interfaces
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
include "llvm/Target/Target.td"
|
|
|
|
include "NVPTXRegisterInfo.td"
|
|
include "NVPTXInstrInfo.td"
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Subtarget Features.
|
|
// - We use the SM version number instead of explicit feature table.
|
|
// - Need at least one feature to avoid generating zero sized array by
|
|
// TableGen in NVPTXGenSubtarget.inc.
|
|
//===----------------------------------------------------------------------===//
|
|
def FeatureDummy : SubtargetFeature<"dummy", "dummy", "true", "">;
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// NVPTX supported processors.
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
class Proc<string Name, list<SubtargetFeature> Features>
|
|
: Processor<Name, NoItineraries, Features>;
|
|
|
|
def : Proc<"sm_10", [FeatureDummy]>;
|
|
|
|
|
|
def NVPTXInstrInfo : InstrInfo {
|
|
}
|
|
|
|
def NVPTX : Target {
|
|
let InstructionSet = NVPTXInstrInfo;
|
|
}
|