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https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123229 91177308-0d34-0410-b5e6-96231b3b80d8
154 lines
4.7 KiB
C++
154 lines
4.7 KiB
C++
//===-- SPUNopFiller.cpp - Add nops/lnops to align the pipelines---===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// The final pass just before assembly printing. This pass is the last
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// checkpoint where nops and lnops are added to the instruction stream to
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// satisfy the dual issue requirements. The actual dual issue scheduling is
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// done (TODO: nowhere, currently)
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//
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//===----------------------------------------------------------------------===//
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#include "SPU.h"
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#include "SPUTargetMachine.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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namespace {
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struct SPUNopFiller : public MachineFunctionPass {
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TargetMachine &TM;
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const TargetInstrInfo *TII;
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const InstrItineraryData *IID;
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bool isEvenPlace; // the instruction slot (mem address) at hand is even/odd
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static char ID;
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SPUNopFiller(TargetMachine &tm)
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: MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()),
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IID(tm.getInstrItineraryData())
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{
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DEBUG( dbgs() << "********** SPU Nop filler **********\n" ; );
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}
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virtual const char *getPassName() const {
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return "SPU nop/lnop Filler";
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}
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void runOnMachineBasicBlock(MachineBasicBlock &MBB);
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bool runOnMachineFunction(MachineFunction &F) {
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isEvenPlace = true; //all functions get an .align 3 directive at start
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for (MachineFunction::iterator FI = F.begin(), FE = F.end();
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FI != FE; ++FI)
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runOnMachineBasicBlock(*FI);
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return true; //never-ever do any more modifications, just print it!
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}
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typedef enum { none = 0, // no more instructions in this function / BB
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pseudo = 1, // this does not get executed
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even = 2,
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odd = 3 } SPUOpPlace;
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SPUOpPlace getOpPlacement( MachineInstr &instr );
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};
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char SPUNopFiller::ID = 0;
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}
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// Fill a BasicBlock to alignment.
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// In the assebly we align the functions to 'even' adresses, but
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// basic blocks have an implicit alignmnet. We hereby define
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// basic blocks to have the same, even, alignment.
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void SPUNopFiller::
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runOnMachineBasicBlock(MachineBasicBlock &MBB)
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{
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assert( isEvenPlace && "basic block start from odd address");
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for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I)
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{
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SPUOpPlace this_optype, next_optype;
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MachineBasicBlock::iterator J = I;
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J++;
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this_optype = getOpPlacement( *I );
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next_optype = none;
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while (J!=MBB.end()){
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next_optype = getOpPlacement( *J );
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++J;
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if (next_optype != pseudo )
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break;
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}
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// padd: odd(wrong), even(wrong), ...
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// to: nop(corr), odd(corr), even(corr)...
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if( isEvenPlace && this_optype == odd && next_optype == even ) {
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DEBUG( dbgs() <<"Adding NOP before: "; );
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DEBUG( I->dump(); );
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BuildMI(MBB, I, I->getDebugLoc(), TII->get(SPU::ENOP));
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isEvenPlace=false;
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}
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// padd: even(wrong), odd(wrong), ...
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// to: lnop(corr), even(corr), odd(corr)...
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else if ( !isEvenPlace && this_optype == even && next_optype == odd){
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DEBUG( dbgs() <<"Adding LNOP before: "; );
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DEBUG( I->dump(); );
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BuildMI(MBB, I, I->getDebugLoc(), TII->get(SPU::LNOP));
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isEvenPlace=true;
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}
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// now go to next mem slot
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if( this_optype != pseudo )
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isEvenPlace = !isEvenPlace;
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}
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// padd basicblock end
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if( !isEvenPlace ){
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MachineBasicBlock::iterator J = MBB.end();
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J--;
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if (getOpPlacement( *J ) == odd) {
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DEBUG( dbgs() <<"Padding basic block with NOP\n"; );
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BuildMI(MBB, J, J->getDebugLoc(), TII->get(SPU::ENOP));
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}
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else {
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J++;
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DEBUG( dbgs() <<"Padding basic block with LNOP\n"; );
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BuildMI(MBB, J, DebugLoc(), TII->get(SPU::LNOP));
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}
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isEvenPlace=true;
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}
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}
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FunctionPass *llvm::createSPUNopFillerPass(SPUTargetMachine &tm) {
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return new SPUNopFiller(tm);
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}
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// Figure out if 'instr' is executed in the even or odd pipeline
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SPUNopFiller::SPUOpPlace
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SPUNopFiller::getOpPlacement( MachineInstr &instr ) {
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int sc = instr.getDesc().getSchedClass();
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const InstrStage *stage = IID->beginStage(sc);
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unsigned FUs = stage->getUnits();
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SPUOpPlace retval;
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switch( FUs ) {
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case 0: retval = pseudo; break;
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case 1: retval = odd; break;
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case 2: retval = even; break;
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default: retval= pseudo;
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assert( false && "got unknown FuncUnit\n");
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break;
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};
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return retval;
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}
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