mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-25 14:30:32 +00:00
f5c0539092
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160354 91177308-0d34-0410-b5e6-96231b3b80d8
576 lines
14 KiB
LLVM
576 lines
14 KiB
LLVM
; RUN: llc < %s -march=cellspu | FileCheck %s
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
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target triple = "spu"
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; $3 = %arg1, $4 = %arg2, $5 = %val1, $6 = %val2
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; $3 = %arg1, $4 = %val1, $5 = %val2
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;
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; For "positive" comparisons:
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; selb $3, $6, $5, <i1>
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; selb $3, $5, $4, <i1>
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;
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; For "negative" comparisons, i.e., those where the result of the comparison
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; must be inverted (setne, for example):
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; selb $3, $5, $6, <i1>
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; selb $3, $4, $5, <i1>
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; i32 integer comparisons:
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define i32 @icmp_eq_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_eq_select_i32:
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; CHECK: ceq
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; CHECK: selb $3, $6, $5, $3
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entry:
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%A = icmp eq i32 %arg1, %arg2
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i1 @icmp_eq_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_eq_setcc_i32:
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; CHECK: ilhu
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; CHECK: ceq
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; CHECK: iohl
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; CHECK: shufb
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entry:
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%A = icmp eq i32 %arg1, %arg2
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ret i1 %A
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}
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define i32 @icmp_eq_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_eq_immed01_i32:
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; CHECK: ceqi
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp eq i32 %arg1, 511
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_eq_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_eq_immed02_i32:
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; CHECK: ceqi
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp eq i32 %arg1, -512
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_eq_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_eq_immed03_i32:
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; CHECK: ceqi
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp eq i32 %arg1, -1
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_eq_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_eq_immed04_i32:
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; CHECK: ila
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; CHECK: ceq
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp eq i32 %arg1, 32768
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_ne_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ne_select_i32:
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; CHECK: ceq
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; CHECK: selb $3, $5, $6, $3
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entry:
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%A = icmp ne i32 %arg1, %arg2
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i1 @icmp_ne_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ne_setcc_i32:
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; CHECK: ceq
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; CHECK: ilhu
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; CHECK: xori
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; CHECK: iohl
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; CHECK: shufb
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entry:
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%A = icmp ne i32 %arg1, %arg2
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ret i1 %A
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}
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define i32 @icmp_ne_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ne_immed01_i32:
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; CHECK: ceqi
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; CHECK: selb $3, $4, $5, $3
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entry:
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%A = icmp ne i32 %arg1, 511
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_ne_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ne_immed02_i32:
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; CHECK: ceqi
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; CHECK: selb $3, $4, $5, $3
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entry:
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%A = icmp ne i32 %arg1, -512
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_ne_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ne_immed03_i32:
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; CHECK: ceqi
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; CHECK: selb $3, $4, $5, $3
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entry:
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%A = icmp ne i32 %arg1, -1
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_ne_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ne_immed04_i32:
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; CHECK: ila
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; CHECK: ceq
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; CHECK: selb $3, $4, $5, $3
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entry:
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%A = icmp ne i32 %arg1, 32768
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_ugt_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ugt_select_i32:
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; CHECK: clgt
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; CHECK: selb $3, $6, $5, $3
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entry:
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%A = icmp ugt i32 %arg1, %arg2
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i1 @icmp_ugt_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ugt_setcc_i32:
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; CHECK: ilhu
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; CHECK: clgt
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; CHECK: iohl
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; CHECK: shufb
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entry:
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%A = icmp ugt i32 %arg1, %arg2
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ret i1 %A
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}
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define i32 @icmp_ugt_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ugt_immed01_i32:
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; CHECK: clgti
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp ugt i32 %arg1, 511
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_ugt_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ugt_immed02_i32:
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; CHECK: clgti
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp ugt i32 %arg1, 4294966784
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_ugt_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ugt_immed03_i32:
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; CHECK: clgti
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp ugt i32 %arg1, 4294967293
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_ugt_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ugt_immed04_i32:
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; CHECK: ila
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; CHECK: clgt
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp ugt i32 %arg1, 32768
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_uge_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_uge_select_i32:
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; CHECK: ceq
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; CHECK: clgt
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; CHECK: or
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; CHECK: selb $3, $6, $5, $3
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entry:
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%A = icmp uge i32 %arg1, %arg2
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i1 @icmp_uge_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_uge_setcc_i32:
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; CHECK: ceq
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; CHECK: clgt
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; CHECK: ilhu
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; CHECK: or
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; CHECK: iohl
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; CHECK: shufb
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entry:
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%A = icmp uge i32 %arg1, %arg2
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ret i1 %A
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}
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;; Note: icmp uge i32 %arg1, <immed> can always be transformed into
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;; icmp ugt i32 %arg1, <immed>-1
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;;
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;; Consequently, even though the patterns exist to match, it's unlikely
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;; they'll ever be generated.
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define i32 @icmp_ult_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ult_select_i32:
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; CHECK: ceq
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; CHECK: clgt
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; CHECK: nor
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; CHECK: selb $3, $6, $5, $3
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entry:
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%A = icmp ult i32 %arg1, %arg2
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i1 @icmp_ult_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ult_setcc_i32:
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; CHECK: ceq
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; CHECK: clgt
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; CHECK: ilhu
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; CHECK: nor
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; CHECK: iohl
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; CHECK: shufb
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entry:
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%A = icmp ult i32 %arg1, %arg2
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ret i1 %A
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}
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define i32 @icmp_ult_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ult_immed01_i32:
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; CHECK: ceqi
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; CHECK: clgti
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; CHECK: nor
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp ult i32 %arg1, 511
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_ult_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ult_immed02_i32:
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; CHECK: ceqi
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; CHECK: clgti
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; CHECK: nor
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp ult i32 %arg1, 4294966784
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_ult_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ult_immed03_i32:
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; CHECK: ceqi
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; CHECK: clgti
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; CHECK: nor
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp ult i32 %arg1, 4294967293
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_ult_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ult_immed04_i32:
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; CHECK: rotmi
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; CHECK: ceqi
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp ult i32 %arg1, 32768
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_ule_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ule_select_i32:
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; CHECK: clgt
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; CHECK: selb $3, $5, $6, $3
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entry:
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%A = icmp ule i32 %arg1, %arg2
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i1 @icmp_ule_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_ule_setcc_i32:
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; CHECK: clgt
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; CHECK: ilhu
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; CHECK: xori
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; CHECK: iohl
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; CHECK: shufb
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entry:
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%A = icmp ule i32 %arg1, %arg2
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ret i1 %A
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}
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;; Note: icmp ule i32 %arg1, <immed> can always be transformed into
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;; icmp ult i32 %arg1, <immed>+1
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;;
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;; Consequently, even though the patterns exist to match, it's unlikely
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;; they'll ever be generated.
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define i32 @icmp_sgt_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_sgt_select_i32:
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; CHECK: cgt
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; CHECK: selb $3, $6, $5, $3
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entry:
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%A = icmp sgt i32 %arg1, %arg2
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i1 @icmp_sgt_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_sgt_setcc_i32:
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; CHECK: ilhu
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; CHECK: cgt
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; CHECK: iohl
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; CHECK: shufb
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entry:
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%A = icmp sgt i32 %arg1, %arg2
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ret i1 %A
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}
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define i32 @icmp_sgt_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_sgt_immed01_i32:
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; CHECK: cgti
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp sgt i32 %arg1, 511
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_sgt_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_sgt_immed02_i32:
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; CHECK: cgti
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp sgt i32 %arg1, 4294966784
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_sgt_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_sgt_immed03_i32:
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; CHECK: cgti
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp sgt i32 %arg1, 4294967293
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_sgt_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_sgt_immed04_i32:
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; CHECK: ila
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; CHECK: cgt
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; CHECK: selb $3, $5, $4, $3
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entry:
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%A = icmp sgt i32 %arg1, 32768
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i32 @icmp_sge_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_sge_select_i32:
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; CHECK: ceq
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; CHECK: cgt
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; CHECK: or
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; CHECK: selb $3, $6, $5, $3
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entry:
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%A = icmp sge i32 %arg1, %arg2
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%B = select i1 %A, i32 %val1, i32 %val2
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ret i32 %B
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}
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define i1 @icmp_sge_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
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; CHECK: icmp_sge_setcc_i32:
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; CHECK: ceq
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; CHECK: cgt
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; CHECK: ilhu
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; CHECK: or
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; CHECK: iohl
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; CHECK: shufb
|
|
|
|
entry:
|
|
%A = icmp sge i32 %arg1, %arg2
|
|
ret i1 %A
|
|
}
|
|
|
|
;; Note: icmp sge i32 %arg1, <immed> can always be transformed into
|
|
;; icmp sgt i32 %arg1, <immed>-1
|
|
;;
|
|
;; Consequently, even though the patterns exist to match, it's unlikely
|
|
;; they'll ever be generated.
|
|
|
|
define i32 @icmp_slt_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
|
|
; CHECK: icmp_slt_select_i32:
|
|
; CHECK: ceq
|
|
; CHECK: cgt
|
|
; CHECK: nor
|
|
; CHECK: selb $3, $6, $5, $3
|
|
|
|
entry:
|
|
%A = icmp slt i32 %arg1, %arg2
|
|
%B = select i1 %A, i32 %val1, i32 %val2
|
|
ret i32 %B
|
|
}
|
|
|
|
define i1 @icmp_slt_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
|
|
; CHECK: icmp_slt_setcc_i32:
|
|
; CHECK: ceq
|
|
; CHECK: cgt
|
|
; CHECK: ilhu
|
|
; CHECK: nor
|
|
; CHECK: iohl
|
|
; CHECK: shufb
|
|
|
|
entry:
|
|
%A = icmp slt i32 %arg1, %arg2
|
|
ret i1 %A
|
|
}
|
|
|
|
define i32 @icmp_slt_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
|
|
; CHECK: icmp_slt_immed01_i32:
|
|
; CHECK: ceqi
|
|
; CHECK: cgti
|
|
; CHECK: nor
|
|
; CHECK: selb $3, $5, $4, $3
|
|
|
|
entry:
|
|
%A = icmp slt i32 %arg1, 511
|
|
%B = select i1 %A, i32 %val1, i32 %val2
|
|
ret i32 %B
|
|
}
|
|
|
|
define i32 @icmp_slt_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
|
|
; CHECK: icmp_slt_immed02_i32:
|
|
; CHECK: ceqi
|
|
; CHECK: cgti
|
|
; CHECK: nor
|
|
; CHECK: selb $3, $5, $4, $3
|
|
|
|
entry:
|
|
%A = icmp slt i32 %arg1, -512
|
|
%B = select i1 %A, i32 %val1, i32 %val2
|
|
ret i32 %B
|
|
}
|
|
|
|
define i32 @icmp_slt_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
|
|
; CHECK: icmp_slt_immed03_i32:
|
|
; CHECK: ceqi
|
|
; CHECK: cgti
|
|
; CHECK: nor
|
|
; CHECK: selb $3, $5, $4, $3
|
|
|
|
entry:
|
|
%A = icmp slt i32 %arg1, -1
|
|
%B = select i1 %A, i32 %val1, i32 %val2
|
|
ret i32 %B
|
|
}
|
|
|
|
define i32 @icmp_slt_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
|
|
; CHECK: icmp_slt_immed04_i32:
|
|
; CHECK: ila
|
|
; CHECK: ceq
|
|
; CHECK: cgt
|
|
; CHECK: nor
|
|
; CHECK: selb $3, $5, $4, $3
|
|
|
|
entry:
|
|
%A = icmp slt i32 %arg1, 32768
|
|
%B = select i1 %A, i32 %val1, i32 %val2
|
|
ret i32 %B
|
|
}
|
|
|
|
define i32 @icmp_sle_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
|
|
; CHECK: icmp_sle_select_i32:
|
|
; CHECK: cgt
|
|
; CHECK: selb $3, $5, $6, $3
|
|
|
|
entry:
|
|
%A = icmp sle i32 %arg1, %arg2
|
|
%B = select i1 %A, i32 %val1, i32 %val2
|
|
ret i32 %B
|
|
}
|
|
|
|
define i1 @icmp_sle_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
|
|
; CHECK: icmp_sle_setcc_i32:
|
|
; CHECK: cgt
|
|
; CHECK: ilhu
|
|
; CHECK: xori
|
|
; CHECK: iohl
|
|
; CHECK: shufb
|
|
|
|
entry:
|
|
%A = icmp sle i32 %arg1, %arg2
|
|
ret i1 %A
|
|
}
|
|
|
|
;; Note: icmp sle i32 %arg1, <immed> can always be transformed into
|
|
;; icmp slt i32 %arg1, <immed>+1
|
|
;;
|
|
;; Consequently, even though the patterns exist to match, it's unlikely
|
|
;; they'll ever be generated.
|
|
|