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https://github.com/c64scene-ar/llvm-6502.git
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ae3a0be92e
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
626 B
LLVM
19 lines
626 B
LLVM
; RUN: llvm-as < %s | llc
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target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
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target triple = "powerpc-apple-darwin9"
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define hidden i64 @__fixunstfdi(ppc_fp128 %a) nounwind {
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entry:
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br i1 false, label %bb3, label %bb4
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bb3: ; preds = %entry
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fsub ppc_fp128 0xM80000000000000000000000000000000, 0xM00000000000000000000000000000000 ; <ppc_fp128>:0 [#uses=1]
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fptoui ppc_fp128 %0 to i32 ; <i32>:1 [#uses=1]
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zext i32 %1 to i64 ; <i64>:2 [#uses=1]
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sub i64 0, %2 ; <i64>:3 [#uses=1]
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ret i64 %3
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bb4: ; preds = %entry
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ret i64 0
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}
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