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llvm-6502
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lib
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Hexagon
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Colin LeMahieu
e8cdd171f9
[Hexagon] Adding A2_xor instruction with IR selection pattern and test.
...
git-svn-id:
https://llvm.org/svn/llvm-project/llvm/trunk@222399
91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 23:22:23 +00:00
..
Disassembler
[Hexagon] Converting from ADD_rr to A2_add which has encoding bits.
2014-11-18 20:28:11 +00:00
InstPrinter
[Hexagon] Reverting 220584 to address ASAN errors.
2014-11-04 00:14:36 +00:00
MCTargetDesc
[Hexagon]
2014-11-13 16:36:30 +00:00
TargetInfo
CMakeLists.txt
[Hexagon] Converting from ADD_rr to A2_add which has encoding bits.
2014-11-18 20:28:11 +00:00
Hexagon.h
Hexagon.td
HexagonAsmPrinter.cpp
[Hexagon] Reverting 220584 to address ASAN errors.
2014-11-04 00:14:36 +00:00
HexagonAsmPrinter.h
HexagonCallingConv.td
HexagonCallingConvLower.cpp
HexagonCallingConvLower.h
HexagonCFGOptimizer.cpp
HexagonCopyToCombine.cpp
HexagonExpandPredSpillCode.cpp
[Hexagon] Converting from ADD_rr to A2_add which has encoding bits.
2014-11-18 20:28:11 +00:00
HexagonFixupHwLoops.cpp
HexagonFrameLowering.cpp
[Hexagon] Converting from ADD_rr to A2_add which has encoding bits.
2014-11-18 20:28:11 +00:00
HexagonFrameLowering.h
HexagonHardwareLoops.cpp
HexagonInstrFormats.td
[Hexagon] Adding basic disassembler.
2014-10-22 16:49:14 +00:00
HexagonInstrFormatsV4.td
HexagonInstrInfo.cpp
[Hexagon] Adding A2_xor instruction with IR selection pattern and test.
2014-11-19 23:22:23 +00:00
HexagonInstrInfo.h
Remove unused argument to CreateTargetScheduleState and change
2014-10-09 01:59:35 +00:00
HexagonInstrInfo.td
[Hexagon] Adding A2_xor instruction with IR selection pattern and test.
2014-11-19 23:22:23 +00:00
HexagonInstrInfoV3.td
HexagonInstrInfoV4.td
HexagonInstrInfoV5.td
HexagonIntrinsics.td
HexagonIntrinsicsDerived.td
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td
HexagonIntrinsicsV5.td
HexagonISelDAGToDAG.cpp
HexagonISelLowering.cpp
We can get the TLOF from the TargetMachine - so constructor no longer requires TargetLoweringObjectFile to be passed.
2014-11-13 21:29:21 +00:00
HexagonISelLowering.h
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp
HexagonMachineScheduler.h
Remove unused argument to CreateTargetScheduleState and change
2014-10-09 01:59:35 +00:00
HexagonMCInstLower.cpp
[Hexagon] Reverting 220584 to address ASAN errors.
2014-11-04 00:14:36 +00:00
HexagonNewValueJump.cpp
HexagonOperands.td
HexagonPeephole.cpp
HexagonRegisterInfo.cpp
[Hexagon] Converting from ADD_rr to A2_add which has encoding bits.
2014-11-18 20:28:11 +00:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td
HexagonRemoveSZExtArgs.cpp
HexagonSchedule.td
HexagonScheduleV4.td
HexagonSelectCCInfo.td
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h
HexagonSplitConst32AndConst64.cpp
HexagonSplitTFRCondSets.cpp
HexagonSubtarget.cpp
HexagonSubtarget.h
HexagonTargetMachine.cpp
This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively
2014-11-13 09:26:31 +00:00
HexagonTargetMachine.h
This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively
2014-11-13 09:26:31 +00:00
HexagonTargetObjectFile.cpp
Handle ctor/init_array initialization.
2014-11-03 14:56:05 +00:00
HexagonTargetObjectFile.h
HexagonVarargsCallingConvention.h
HexagonVLIWPacketizer.cpp
Remove the TargetMachine from DFAPacketizer since it was only
2014-10-14 01:03:16 +00:00
LLVMBuild.txt
[Hexagon] Reverting 220584 to address ASAN errors.
2014-11-04 00:14:36 +00:00
Makefile
[Hexagon] Reverting 220584 to address ASAN errors.
2014-11-04 00:14:36 +00:00