mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-01 04:29:57 +00:00
One of several parallel first steps to remove the target type of pointers, replacing them with a single opaque pointer type. This adds an explicit type parameter to the gep instruction so that when the first parameter becomes an opaque pointer type, the type to gep through is still available to the instructions. * This doesn't modify gep operators, only instructions (operators will be handled separately) * Textual IR changes only. Bitcode (including upgrade) and changing the in-memory representation will be in separate changes. * geps of vectors are transformed as: getelementptr <4 x float*> %x, ... ->getelementptr float, <4 x float*> %x, ... Then, once the opaque pointer type is introduced, this will ultimately look like: getelementptr float, <4 x ptr> %x with the unambiguous interpretation that it is a vector of pointers to float. * address spaces remain on the pointer, not the type: getelementptr float addrspace(1)* %x ->getelementptr float, float addrspace(1)* %x Then, eventually: getelementptr float, ptr addrspace(1) %x Importantly, the massive amount of test case churn has been automated by same crappy python code. I had to manually update a few test cases that wouldn't fit the script's model (r228970,r229196,r229197,r229198). The python script just massages stdin and writes the result to stdout, I then wrapped that in a shell script to handle replacing files, then using the usual find+xargs to migrate all the files. update.py: import fileinput import sys import re ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))") normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))") def conv(match, line): if not match: return line line = match.groups()[0] if len(match.groups()[5]) == 0: line += match.groups()[2] line += match.groups()[3] line += ", " line += match.groups()[1] line += "\n" return line for line in sys.stdin: if line.find("getelementptr ") == line.find("getelementptr inbounds"): if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("): line = conv(re.match(ibrep, line), line) elif line.find("getelementptr ") != line.find("getelementptr ("): line = conv(re.match(normrep, line), line) sys.stdout.write(line) apply.sh: for name in "$@" do python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name" rm -f "$name.tmp" done The actual commands: From llvm/src: find test/ -name *.ll | xargs ./apply.sh From llvm/src/tools/clang: find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}" From llvm/src/tools/polly: find test/ -name *.ll | xargs ./apply.sh After that, check-all (with llvm, clang, clang-tools-extra, lld, compiler-rt, and polly all checked out). The extra 'rm' in the apply.sh script is due to a few files in clang's test suite using interesting unicode stuff that my python script was throwing exceptions on. None of those files needed to be migrated, so it seemed sufficient to ignore those cases. Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7636 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230786 91177308-0d34-0410-b5e6-96231b3b80d8
741 lines
22 KiB
LLVM
741 lines
22 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s
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; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck --check-prefix=R600 --check-prefix=FUNC %s
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; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s
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; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s
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;===------------------------------------------------------------------------===;
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; GLOBAL ADDRESS SPACE
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;===------------------------------------------------------------------------===;
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; Load an i8 value from the global address space.
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; FUNC-LABEL: {{^}}load_i8:
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; R600: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
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; SI: buffer_load_ubyte v{{[0-9]+}},
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define void @load_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
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%1 = load i8 addrspace(1)* %in
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%2 = zext i8 %1 to i32
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store i32 %2, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_i8_sext:
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; R600: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]]
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; R600: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]]
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; R600: 24
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; R600: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]]
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; R600: 24
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; SI: buffer_load_sbyte
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define void @load_i8_sext(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
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entry:
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%0 = load i8 addrspace(1)* %in
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%1 = sext i8 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_v2i8:
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; R600: VTX_READ_8
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; R600: VTX_READ_8
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; SI: buffer_load_ubyte
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; SI: buffer_load_ubyte
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define void @load_v2i8(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(1)* %in) {
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entry:
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%0 = load <2 x i8> addrspace(1)* %in
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%1 = zext <2 x i8> %0 to <2 x i32>
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store <2 x i32> %1, <2 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_v2i8_sext:
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; R600-DAG: VTX_READ_8 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
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; R600-DAG: VTX_READ_8 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
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; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_X_CHAN:[XYZW]]], [[DST_X]]
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; R600-DAG: 24
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; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_X_CHAN]]
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; R600-DAG: 24
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; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Y_CHAN:[XYZW]]], [[DST_Y]]
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; R600-DAG: 24
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; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Y_CHAN]]
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; R600-DAG: 24
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; SI: buffer_load_sbyte
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; SI: buffer_load_sbyte
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define void @load_v2i8_sext(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(1)* %in) {
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entry:
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%0 = load <2 x i8> addrspace(1)* %in
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%1 = sext <2 x i8> %0 to <2 x i32>
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store <2 x i32> %1, <2 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_v4i8:
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; R600: VTX_READ_8
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; R600: VTX_READ_8
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; R600: VTX_READ_8
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; R600: VTX_READ_8
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; SI: buffer_load_ubyte
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; SI: buffer_load_ubyte
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; SI: buffer_load_ubyte
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; SI: buffer_load_ubyte
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define void @load_v4i8(<4 x i32> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) {
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entry:
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%0 = load <4 x i8> addrspace(1)* %in
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%1 = zext <4 x i8> %0 to <4 x i32>
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store <4 x i32> %1, <4 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_v4i8_sext:
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; R600-DAG: VTX_READ_8 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
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; R600-DAG: VTX_READ_8 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
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; R600-DAG: VTX_READ_8 [[DST_Z:T[0-9]\.[XYZW]]], [[DST_Z]]
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; R600-DAG: VTX_READ_8 [[DST_W:T[0-9]\.[XYZW]]], [[DST_W]]
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; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_X_CHAN:[XYZW]]], [[DST_X]]
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; R600-DAG: 24
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; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_X_CHAN]]
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; R600-DAG: 24
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; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Y_CHAN:[XYZW]]], [[DST_Y]]
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; R600-DAG: 24
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; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Y_CHAN]]
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; R600-DAG: 24
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; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Z_CHAN:[XYZW]]], [[DST_Z]]
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; R600-DAG: 24
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; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Z_CHAN]]
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; R600-DAG: 24
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; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_W_CHAN:[XYZW]]], [[DST_W]]
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; R600-DAG: 24
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; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_W_CHAN]]
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; R600-DAG: 24
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; SI: buffer_load_sbyte
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; SI: buffer_load_sbyte
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; SI: buffer_load_sbyte
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; SI: buffer_load_sbyte
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define void @load_v4i8_sext(<4 x i32> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) {
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entry:
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%0 = load <4 x i8> addrspace(1)* %in
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%1 = sext <4 x i8> %0 to <4 x i32>
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store <4 x i32> %1, <4 x i32> addrspace(1)* %out
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ret void
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}
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; Load an i16 value from the global address space.
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; FUNC-LABEL: {{^}}load_i16:
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; R600: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
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; SI: buffer_load_ushort
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define void @load_i16(i32 addrspace(1)* %out, i16 addrspace(1)* %in) {
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entry:
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%0 = load i16 addrspace(1)* %in
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%1 = zext i16 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_i16_sext:
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; R600: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], [[DST]]
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; R600: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]]
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; R600: 16
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; R600: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]]
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; R600: 16
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; SI: buffer_load_sshort
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define void @load_i16_sext(i32 addrspace(1)* %out, i16 addrspace(1)* %in) {
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entry:
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%0 = load i16 addrspace(1)* %in
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%1 = sext i16 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_v2i16:
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; R600: VTX_READ_16
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; R600: VTX_READ_16
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; SI: buffer_load_ushort
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; SI: buffer_load_ushort
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define void @load_v2i16(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) {
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entry:
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%0 = load <2 x i16> addrspace(1)* %in
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%1 = zext <2 x i16> %0 to <2 x i32>
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store <2 x i32> %1, <2 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_v2i16_sext:
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; R600-DAG: VTX_READ_16 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
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; R600-DAG: VTX_READ_16 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
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; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_X_CHAN:[XYZW]]], [[DST_X]]
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; R600-DAG: 16
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; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_X_CHAN]]
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; R600-DAG: 16
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; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Y_CHAN:[XYZW]]], [[DST_Y]]
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; R600-DAG: 16
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; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Y_CHAN]]
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; R600-DAG: 16
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; SI: buffer_load_sshort
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; SI: buffer_load_sshort
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define void @load_v2i16_sext(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) {
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entry:
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%0 = load <2 x i16> addrspace(1)* %in
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%1 = sext <2 x i16> %0 to <2 x i32>
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store <2 x i32> %1, <2 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_v4i16:
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; R600: VTX_READ_16
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; R600: VTX_READ_16
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; R600: VTX_READ_16
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; R600: VTX_READ_16
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; SI: buffer_load_ushort
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; SI: buffer_load_ushort
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; SI: buffer_load_ushort
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; SI: buffer_load_ushort
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define void @load_v4i16(<4 x i32> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) {
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entry:
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%0 = load <4 x i16> addrspace(1)* %in
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%1 = zext <4 x i16> %0 to <4 x i32>
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store <4 x i32> %1, <4 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_v4i16_sext:
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; R600-DAG: VTX_READ_16 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
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; R600-DAG: VTX_READ_16 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
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; R600-DAG: VTX_READ_16 [[DST_Z:T[0-9]\.[XYZW]]], [[DST_Z]]
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; R600-DAG: VTX_READ_16 [[DST_W:T[0-9]\.[XYZW]]], [[DST_W]]
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; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_X_CHAN:[XYZW]]], [[DST_X]]
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; R600-DAG: 16
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; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_X_CHAN]]
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; R600-DAG: 16
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; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Y_CHAN:[XYZW]]], [[DST_Y]]
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; R600-DAG: 16
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; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Y_CHAN]]
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; R600-DAG: 16
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; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_Z_CHAN:[XYZW]]], [[DST_Z]]
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; R600-DAG: 16
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; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_Z_CHAN]]
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; R600-DAG: 16
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; R600-DAG: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_W_CHAN:[XYZW]]], [[DST_W]]
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; R600-DAG: 16
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; R600-DAG: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_W_CHAN]]
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; R600-DAG: 16
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; SI: buffer_load_sshort
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; SI: buffer_load_sshort
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; SI: buffer_load_sshort
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; SI: buffer_load_sshort
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define void @load_v4i16_sext(<4 x i32> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) {
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entry:
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%0 = load <4 x i16> addrspace(1)* %in
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%1 = sext <4 x i16> %0 to <4 x i32>
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store <4 x i32> %1, <4 x i32> addrspace(1)* %out
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ret void
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}
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; load an i32 value from the global address space.
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; FUNC-LABEL: {{^}}load_i32:
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; R600: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
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; SI: buffer_load_dword v{{[0-9]+}}
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define void @load_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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entry:
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%0 = load i32 addrspace(1)* %in
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; load a f32 value from the global address space.
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; FUNC-LABEL: {{^}}load_f32:
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; R600: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
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; SI: buffer_load_dword v{{[0-9]+}}
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define void @load_f32(float addrspace(1)* %out, float addrspace(1)* %in) {
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entry:
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%0 = load float addrspace(1)* %in
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store float %0, float addrspace(1)* %out
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ret void
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}
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; load a v2f32 value from the global address space
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; FUNC-LABEL: {{^}}load_v2f32:
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; R600: MEM_RAT
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; R600: VTX_READ_64
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; SI: buffer_load_dwordx2
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define void @load_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in) {
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entry:
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%0 = load <2 x float> addrspace(1)* %in
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store <2 x float> %0, <2 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_i64:
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; R600: VTX_READ_64
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; SI: buffer_load_dwordx2
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define void @load_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) {
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entry:
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%0 = load i64 addrspace(1)* %in
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store i64 %0, i64 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_i64_sext:
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; R600: MEM_RAT
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; R600: MEM_RAT
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; R600: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, T{{[0-9]\.[XYZW]}}, literal.x
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; R600: 31
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; SI: buffer_load_dword
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define void @load_i64_sext(i64 addrspace(1)* %out, i32 addrspace(1)* %in) {
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entry:
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%0 = load i32 addrspace(1)* %in
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%1 = sext i32 %0 to i64
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store i64 %1, i64 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_i64_zext:
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; R600: MEM_RAT
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; R600: MEM_RAT
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define void @load_i64_zext(i64 addrspace(1)* %out, i32 addrspace(1)* %in) {
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entry:
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%0 = load i32 addrspace(1)* %in
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%1 = zext i32 %0 to i64
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store i64 %1, i64 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}load_v8i32:
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; R600: VTX_READ_128
|
|
; R600: VTX_READ_128
|
|
; XXX: We should be using DWORDX4 instructions on SI.
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
define void @load_v8i32(<8 x i32> addrspace(1)* %out, <8 x i32> addrspace(1)* %in) {
|
|
entry:
|
|
%0 = load <8 x i32> addrspace(1)* %in
|
|
store <8 x i32> %0, <8 x i32> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}load_v16i32:
|
|
; R600: VTX_READ_128
|
|
; R600: VTX_READ_128
|
|
; R600: VTX_READ_128
|
|
; R600: VTX_READ_128
|
|
; XXX: We should be using DWORDX4 instructions on SI.
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
; SI: buffer_load_dword
|
|
define void @load_v16i32(<16 x i32> addrspace(1)* %out, <16 x i32> addrspace(1)* %in) {
|
|
entry:
|
|
%0 = load <16 x i32> addrspace(1)* %in
|
|
store <16 x i32> %0, <16 x i32> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
;===------------------------------------------------------------------------===;
|
|
; CONSTANT ADDRESS SPACE
|
|
;===------------------------------------------------------------------------===;
|
|
|
|
; Load a sign-extended i8 value
|
|
; FUNC-LABEL: {{^}}load_const_i8_sext:
|
|
; R600: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]]
|
|
; R600: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]]
|
|
; R600: 24
|
|
; R600: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]]
|
|
; R600: 24
|
|
; SI: buffer_load_sbyte v{{[0-9]+}},
|
|
define void @load_const_i8_sext(i32 addrspace(1)* %out, i8 addrspace(2)* %in) {
|
|
entry:
|
|
%0 = load i8 addrspace(2)* %in
|
|
%1 = sext i8 %0 to i32
|
|
store i32 %1, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; Load an aligned i8 value
|
|
; FUNC-LABEL: {{^}}load_const_i8_aligned:
|
|
; R600: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
|
|
; SI: buffer_load_ubyte v{{[0-9]+}},
|
|
define void @load_const_i8_aligned(i32 addrspace(1)* %out, i8 addrspace(2)* %in) {
|
|
entry:
|
|
%0 = load i8 addrspace(2)* %in
|
|
%1 = zext i8 %0 to i32
|
|
store i32 %1, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; Load an un-aligned i8 value
|
|
; FUNC-LABEL: {{^}}load_const_i8_unaligned:
|
|
; R600: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
|
|
; SI: buffer_load_ubyte v{{[0-9]+}},
|
|
define void @load_const_i8_unaligned(i32 addrspace(1)* %out, i8 addrspace(2)* %in) {
|
|
entry:
|
|
%0 = getelementptr i8, i8 addrspace(2)* %in, i32 1
|
|
%1 = load i8 addrspace(2)* %0
|
|
%2 = zext i8 %1 to i32
|
|
store i32 %2, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; Load a sign-extended i16 value
|
|
; FUNC-LABEL: {{^}}load_const_i16_sext:
|
|
; R600: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], [[DST]]
|
|
; R600: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]]
|
|
; R600: 16
|
|
; R600: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]]
|
|
; R600: 16
|
|
; SI: buffer_load_sshort
|
|
define void @load_const_i16_sext(i32 addrspace(1)* %out, i16 addrspace(2)* %in) {
|
|
entry:
|
|
%0 = load i16 addrspace(2)* %in
|
|
%1 = sext i16 %0 to i32
|
|
store i32 %1, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; Load an aligned i16 value
|
|
; FUNC-LABEL: {{^}}load_const_i16_aligned:
|
|
; R600: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
|
|
; SI: buffer_load_ushort
|
|
define void @load_const_i16_aligned(i32 addrspace(1)* %out, i16 addrspace(2)* %in) {
|
|
entry:
|
|
%0 = load i16 addrspace(2)* %in
|
|
%1 = zext i16 %0 to i32
|
|
store i32 %1, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; Load an un-aligned i16 value
|
|
; FUNC-LABEL: {{^}}load_const_i16_unaligned:
|
|
; R600: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
|
|
; SI: buffer_load_ushort
|
|
define void @load_const_i16_unaligned(i32 addrspace(1)* %out, i16 addrspace(2)* %in) {
|
|
entry:
|
|
%0 = getelementptr i16, i16 addrspace(2)* %in, i32 1
|
|
%1 = load i16 addrspace(2)* %0
|
|
%2 = zext i16 %1 to i32
|
|
store i32 %2, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; Load an i32 value from the constant address space.
|
|
; FUNC-LABEL: {{^}}load_const_addrspace_i32:
|
|
; R600: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
|
|
|
|
; SI: s_load_dword s{{[0-9]+}}
|
|
define void @load_const_addrspace_i32(i32 addrspace(1)* %out, i32 addrspace(2)* %in) {
|
|
entry:
|
|
%0 = load i32 addrspace(2)* %in
|
|
store i32 %0, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; Load a f32 value from the constant address space.
|
|
; FUNC-LABEL: {{^}}load_const_addrspace_f32:
|
|
; R600: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
|
|
|
|
; SI: s_load_dword s{{[0-9]+}}
|
|
define void @load_const_addrspace_f32(float addrspace(1)* %out, float addrspace(2)* %in) {
|
|
%1 = load float addrspace(2)* %in
|
|
store float %1, float addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
;===------------------------------------------------------------------------===;
|
|
; LOCAL ADDRESS SPACE
|
|
;===------------------------------------------------------------------------===;
|
|
|
|
; Load an i8 value from the local address space.
|
|
; FUNC-LABEL: {{^}}load_i8_local:
|
|
; R600: LDS_UBYTE_READ_RET
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_u8
|
|
define void @load_i8_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) {
|
|
%1 = load i8 addrspace(3)* %in
|
|
%2 = zext i8 %1 to i32
|
|
store i32 %2, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}load_i8_sext_local:
|
|
; R600: LDS_UBYTE_READ_RET
|
|
; R600: ASHR
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_i8
|
|
define void @load_i8_sext_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load i8 addrspace(3)* %in
|
|
%1 = sext i8 %0 to i32
|
|
store i32 %1, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}load_v2i8_local:
|
|
; R600: LDS_UBYTE_READ_RET
|
|
; R600: LDS_UBYTE_READ_RET
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_u8
|
|
; SI: ds_read_u8
|
|
define void @load_v2i8_local(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load <2 x i8> addrspace(3)* %in
|
|
%1 = zext <2 x i8> %0 to <2 x i32>
|
|
store <2 x i32> %1, <2 x i32> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}load_v2i8_sext_local:
|
|
; R600-DAG: LDS_UBYTE_READ_RET
|
|
; R600-DAG: LDS_UBYTE_READ_RET
|
|
; R600-DAG: ASHR
|
|
; R600-DAG: ASHR
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_i8
|
|
; SI: ds_read_i8
|
|
define void @load_v2i8_sext_local(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load <2 x i8> addrspace(3)* %in
|
|
%1 = sext <2 x i8> %0 to <2 x i32>
|
|
store <2 x i32> %1, <2 x i32> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}load_v4i8_local:
|
|
; R600: LDS_UBYTE_READ_RET
|
|
; R600: LDS_UBYTE_READ_RET
|
|
; R600: LDS_UBYTE_READ_RET
|
|
; R600: LDS_UBYTE_READ_RET
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_u8
|
|
; SI: ds_read_u8
|
|
; SI: ds_read_u8
|
|
; SI: ds_read_u8
|
|
define void @load_v4i8_local(<4 x i32> addrspace(1)* %out, <4 x i8> addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load <4 x i8> addrspace(3)* %in
|
|
%1 = zext <4 x i8> %0 to <4 x i32>
|
|
store <4 x i32> %1, <4 x i32> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}load_v4i8_sext_local:
|
|
; R600-DAG: LDS_UBYTE_READ_RET
|
|
; R600-DAG: LDS_UBYTE_READ_RET
|
|
; R600-DAG: LDS_UBYTE_READ_RET
|
|
; R600-DAG: LDS_UBYTE_READ_RET
|
|
; R600-DAG: ASHR
|
|
; R600-DAG: ASHR
|
|
; R600-DAG: ASHR
|
|
; R600-DAG: ASHR
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_i8
|
|
; SI: ds_read_i8
|
|
; SI: ds_read_i8
|
|
; SI: ds_read_i8
|
|
define void @load_v4i8_sext_local(<4 x i32> addrspace(1)* %out, <4 x i8> addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load <4 x i8> addrspace(3)* %in
|
|
%1 = sext <4 x i8> %0 to <4 x i32>
|
|
store <4 x i32> %1, <4 x i32> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; Load an i16 value from the local address space.
|
|
; FUNC-LABEL: {{^}}load_i16_local:
|
|
; R600: LDS_USHORT_READ_RET
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_u16
|
|
define void @load_i16_local(i32 addrspace(1)* %out, i16 addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load i16 addrspace(3)* %in
|
|
%1 = zext i16 %0 to i32
|
|
store i32 %1, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}load_i16_sext_local:
|
|
; R600: LDS_USHORT_READ_RET
|
|
; R600: ASHR
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_i16
|
|
define void @load_i16_sext_local(i32 addrspace(1)* %out, i16 addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load i16 addrspace(3)* %in
|
|
%1 = sext i16 %0 to i32
|
|
store i32 %1, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}load_v2i16_local:
|
|
; R600: LDS_USHORT_READ_RET
|
|
; R600: LDS_USHORT_READ_RET
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_u16
|
|
; SI: ds_read_u16
|
|
define void @load_v2i16_local(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load <2 x i16> addrspace(3)* %in
|
|
%1 = zext <2 x i16> %0 to <2 x i32>
|
|
store <2 x i32> %1, <2 x i32> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}load_v2i16_sext_local:
|
|
; R600-DAG: LDS_USHORT_READ_RET
|
|
; R600-DAG: LDS_USHORT_READ_RET
|
|
; R600-DAG: ASHR
|
|
; R600-DAG: ASHR
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_i16
|
|
; SI: ds_read_i16
|
|
define void @load_v2i16_sext_local(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load <2 x i16> addrspace(3)* %in
|
|
%1 = sext <2 x i16> %0 to <2 x i32>
|
|
store <2 x i32> %1, <2 x i32> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}load_v4i16_local:
|
|
; R600: LDS_USHORT_READ_RET
|
|
; R600: LDS_USHORT_READ_RET
|
|
; R600: LDS_USHORT_READ_RET
|
|
; R600: LDS_USHORT_READ_RET
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_u16
|
|
; SI: ds_read_u16
|
|
; SI: ds_read_u16
|
|
; SI: ds_read_u16
|
|
define void @load_v4i16_local(<4 x i32> addrspace(1)* %out, <4 x i16> addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load <4 x i16> addrspace(3)* %in
|
|
%1 = zext <4 x i16> %0 to <4 x i32>
|
|
store <4 x i32> %1, <4 x i32> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}load_v4i16_sext_local:
|
|
; R600-DAG: LDS_USHORT_READ_RET
|
|
; R600-DAG: LDS_USHORT_READ_RET
|
|
; R600-DAG: LDS_USHORT_READ_RET
|
|
; R600-DAG: LDS_USHORT_READ_RET
|
|
; R600-DAG: ASHR
|
|
; R600-DAG: ASHR
|
|
; R600-DAG: ASHR
|
|
; R600-DAG: ASHR
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_i16
|
|
; SI: ds_read_i16
|
|
; SI: ds_read_i16
|
|
; SI: ds_read_i16
|
|
define void @load_v4i16_sext_local(<4 x i32> addrspace(1)* %out, <4 x i16> addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load <4 x i16> addrspace(3)* %in
|
|
%1 = sext <4 x i16> %0 to <4 x i32>
|
|
store <4 x i32> %1, <4 x i32> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; load an i32 value from the local address space.
|
|
; FUNC-LABEL: {{^}}load_i32_local:
|
|
; R600: LDS_READ_RET
|
|
; SI-NOT: s_wqm_b64
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_b32
|
|
define void @load_i32_local(i32 addrspace(1)* %out, i32 addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load i32 addrspace(3)* %in
|
|
store i32 %0, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; load a f32 value from the local address space.
|
|
; FUNC-LABEL: {{^}}load_f32_local:
|
|
; R600: LDS_READ_RET
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_b32
|
|
define void @load_f32_local(float addrspace(1)* %out, float addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load float addrspace(3)* %in
|
|
store float %0, float addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; load a v2f32 value from the local address space
|
|
; FUNC-LABEL: {{^}}load_v2f32_local:
|
|
; R600: LDS_READ_RET
|
|
; R600: LDS_READ_RET
|
|
; SI: s_mov_b32 m0
|
|
; SI: ds_read_b64
|
|
define void @load_v2f32_local(<2 x float> addrspace(1)* %out, <2 x float> addrspace(3)* %in) {
|
|
entry:
|
|
%0 = load <2 x float> addrspace(3)* %in
|
|
store <2 x float> %0, <2 x float> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; Test loading a i32 and v2i32 value from the same base pointer.
|
|
; FUNC-LABEL: {{^}}load_i32_v2i32_local:
|
|
; R600: LDS_READ_RET
|
|
; R600: LDS_READ_RET
|
|
; R600: LDS_READ_RET
|
|
; SI-DAG: ds_read_b32
|
|
; SI-DAG: ds_read2_b32
|
|
define void @load_i32_v2i32_local(<2 x i32> addrspace(1)* %out, i32 addrspace(3)* %in) {
|
|
%scalar = load i32 addrspace(3)* %in
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%tmp0 = bitcast i32 addrspace(3)* %in to <2 x i32> addrspace(3)*
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%vec_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(3)* %tmp0, i32 2
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|
%vec0 = load <2 x i32> addrspace(3)* %vec_ptr, align 4
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|
%vec1 = insertelement <2 x i32> <i32 0, i32 0>, i32 %scalar, i32 0
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|
%vec = add <2 x i32> %vec0, %vec1
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|
store <2 x i32> %vec, <2 x i32> addrspace(1)* %out
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|
ret void
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|
}
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|
|
|
|
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@lds = addrspace(3) global [512 x i32] undef, align 4
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|
|
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; On SI we need to make sure that the base offset is a register and not
|
|
; an immediate.
|
|
; FUNC-LABEL: {{^}}load_i32_local_const_ptr:
|
|
; SI: v_mov_b32_e32 v[[ZERO:[0-9]+]], 0
|
|
; SI: ds_read_b32 v0, v[[ZERO]] offset:4
|
|
; R600: LDS_READ_RET
|
|
define void @load_i32_local_const_ptr(i32 addrspace(1)* %out, i32 addrspace(3)* %in) {
|
|
entry:
|
|
%tmp0 = getelementptr [512 x i32], [512 x i32] addrspace(3)* @lds, i32 0, i32 1
|
|
%tmp1 = load i32 addrspace(3)* %tmp0
|
|
%tmp2 = getelementptr i32, i32 addrspace(1)* %out, i32 1
|
|
store i32 %tmp1, i32 addrspace(1)* %tmp2
|
|
ret void
|
|
}
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