llvm-6502/test/CodeGen/SystemZ/insert-02.ll
David Blaikie 198d8baafb [opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.

This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.

* This doesn't modify gep operators, only instructions (operators will be
  handled separately)

* Textual IR changes only. Bitcode (including upgrade) and changing the
  in-memory representation will be in separate changes.

* geps of vectors are transformed as:
    getelementptr <4 x float*> %x, ...
  ->getelementptr float, <4 x float*> %x, ...
  Then, once the opaque pointer type is introduced, this will ultimately look
  like:
    getelementptr float, <4 x ptr> %x
  with the unambiguous interpretation that it is a vector of pointers to float.

* address spaces remain on the pointer, not the type:
    getelementptr float addrspace(1)* %x
  ->getelementptr float, float addrspace(1)* %x
  Then, eventually:
    getelementptr float, ptr addrspace(1) %x

Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.

update.py:
import fileinput
import sys
import re

ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile(       r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")

def conv(match, line):
  if not match:
    return line
  line = match.groups()[0]
  if len(match.groups()[5]) == 0:
    line += match.groups()[2]
  line += match.groups()[3]
  line += ", "
  line += match.groups()[1]
  line += "\n"
  return line

for line in sys.stdin:
  if line.find("getelementptr ") == line.find("getelementptr inbounds"):
    if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
      line = conv(re.match(ibrep, line), line)
  elif line.find("getelementptr ") != line.find("getelementptr ("):
    line = conv(re.match(normrep, line), line)
  sys.stdout.write(line)

apply.sh:
for name in "$@"
do
  python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
  rm -f "$name.tmp"
done

The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh

After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).

The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7636

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230786 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 19:29:02 +00:00

231 lines
5.6 KiB
LLVM

; Test insertions of memory into the low byte of an i64.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; Check a plain insertion with (or (and ... -0xff) (zext (load ....))).
; The whole sequence can be performed by IC.
define i64 @f1(i64 %orig, i8 *%ptr) {
; CHECK-LABEL: f1:
; CHECK-NOT: ni
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i64
%ptr1 = and i64 %orig, -256
%or = or i64 %ptr1, %ptr2
ret i64 %or
}
; Like f1, but with the operands reversed.
define i64 @f2(i64 %orig, i8 *%ptr) {
; CHECK-LABEL: f2:
; CHECK-NOT: ni
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i64
%ptr1 = and i64 %orig, -256
%or = or i64 %ptr2, %ptr1
ret i64 %or
}
; Check a case where more bits than lower 8 are masked out of the
; register value. We can use IC but must keep the original mask.
define i64 @f3(i64 %orig, i8 *%ptr) {
; CHECK-LABEL: f3:
; CHECK: nill %r2, 65024
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i64
%ptr1 = and i64 %orig, -512
%or = or i64 %ptr1, %ptr2
ret i64 %or
}
; Like f3, but with the operands reversed.
define i64 @f4(i64 %orig, i8 *%ptr) {
; CHECK-LABEL: f4:
; CHECK: nill %r2, 65024
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i64
%ptr1 = and i64 %orig, -512
%or = or i64 %ptr2, %ptr1
ret i64 %or
}
; Check a case where the low 8 bits are cleared by a shift left.
define i64 @f5(i64 %orig, i8 *%ptr) {
; CHECK-LABEL: f5:
; CHECK: sllg %r2, %r2, 8
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i64
%ptr1 = shl i64 %orig, 8
%or = or i64 %ptr1, %ptr2
ret i64 %or
}
; Like f5, but with the operands reversed.
define i64 @f6(i64 %orig, i8 *%ptr) {
; CHECK-LABEL: f6:
; CHECK: sllg %r2, %r2, 8
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i64
%ptr1 = shl i64 %orig, 8
%or = or i64 %ptr2, %ptr1
ret i64 %or
}
; Check insertions into a constant.
define i64 @f7(i64 %orig, i8 *%ptr) {
; CHECK-LABEL: f7:
; CHECK: lghi %r2, 256
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i64
%or = or i64 %ptr2, 256
ret i64 %or
}
; Like f7, but with the operands reversed.
define i64 @f8(i64 %orig, i8 *%ptr) {
; CHECK-LABEL: f8:
; CHECK: lghi %r2, 256
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i64
%or = or i64 256, %ptr2
ret i64 %or
}
; Check the high end of the IC range.
define i64 @f9(i64 %orig, i8 *%src) {
; CHECK-LABEL: f9:
; CHECK: ic %r2, 4095(%r3)
; CHECK: br %r14
%ptr = getelementptr i8, i8 *%src, i64 4095
%val = load i8 *%ptr
%src2 = zext i8 %val to i64
%src1 = and i64 %orig, -256
%or = or i64 %src2, %src1
ret i64 %or
}
; Check the next byte up, which should use ICY instead of IC.
define i64 @f10(i64 %orig, i8 *%src) {
; CHECK-LABEL: f10:
; CHECK: icy %r2, 4096(%r3)
; CHECK: br %r14
%ptr = getelementptr i8, i8 *%src, i64 4096
%val = load i8 *%ptr
%src2 = zext i8 %val to i64
%src1 = and i64 %orig, -256
%or = or i64 %src2, %src1
ret i64 %or
}
; Check the high end of the ICY range.
define i64 @f11(i64 %orig, i8 *%src) {
; CHECK-LABEL: f11:
; CHECK: icy %r2, 524287(%r3)
; CHECK: br %r14
%ptr = getelementptr i8, i8 *%src, i64 524287
%val = load i8 *%ptr
%src2 = zext i8 %val to i64
%src1 = and i64 %orig, -256
%or = or i64 %src2, %src1
ret i64 %or
}
; Check the next byte up, which needs separate address logic.
; Other sequences besides this one would be OK.
define i64 @f12(i64 %orig, i8 *%src) {
; CHECK-LABEL: f12:
; CHECK: agfi %r3, 524288
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i8, i8 *%src, i64 524288
%val = load i8 *%ptr
%src2 = zext i8 %val to i64
%src1 = and i64 %orig, -256
%or = or i64 %src2, %src1
ret i64 %or
}
; Check the high end of the negative ICY range.
define i64 @f13(i64 %orig, i8 *%src) {
; CHECK-LABEL: f13:
; CHECK: icy %r2, -1(%r3)
; CHECK: br %r14
%ptr = getelementptr i8, i8 *%src, i64 -1
%val = load i8 *%ptr
%src2 = zext i8 %val to i64
%src1 = and i64 %orig, -256
%or = or i64 %src2, %src1
ret i64 %or
}
; Check the low end of the ICY range.
define i64 @f14(i64 %orig, i8 *%src) {
; CHECK-LABEL: f14:
; CHECK: icy %r2, -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i8, i8 *%src, i64 -524288
%val = load i8 *%ptr
%src2 = zext i8 %val to i64
%src1 = and i64 %orig, -256
%or = or i64 %src2, %src1
ret i64 %or
}
; Check the next byte down, which needs separate address logic.
; Other sequences besides this one would be OK.
define i64 @f15(i64 %orig, i8 *%src) {
; CHECK-LABEL: f15:
; CHECK: agfi %r3, -524289
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i8, i8 *%src, i64 -524289
%val = load i8 *%ptr
%src2 = zext i8 %val to i64
%src1 = and i64 %orig, -256
%or = or i64 %src2, %src1
ret i64 %or
}
; Check that IC allows an index.
define i64 @f16(i64 %orig, i8 *%src, i64 %index) {
; CHECK-LABEL: f16:
; CHECK: ic %r2, 4095({{%r4,%r3|%r3,%r4}})
; CHECK: br %r14
%ptr1 = getelementptr i8, i8 *%src, i64 %index
%ptr2 = getelementptr i8, i8 *%ptr1, i64 4095
%val = load i8 *%ptr2
%src2 = zext i8 %val to i64
%src1 = and i64 %orig, -256
%or = or i64 %src2, %src1
ret i64 %or
}
; Check that ICY allows an index.
define i64 @f17(i64 %orig, i8 *%src, i64 %index) {
; CHECK-LABEL: f17:
; CHECK: icy %r2, 4096({{%r4,%r3|%r3,%r4}})
; CHECK: br %r14
%ptr1 = getelementptr i8, i8 *%src, i64 %index
%ptr2 = getelementptr i8, i8 *%ptr1, i64 4096
%val = load i8 *%ptr2
%src2 = zext i8 %val to i64
%src1 = and i64 %orig, -256
%or = or i64 %src2, %src1
ret i64 %or
}